DS90UB901QSQ/NPB National Semiconductor, DS90UB901QSQ/NPB Datasheet - Page 33

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DS90UB901QSQ/NPB

Manufacturer Part Number
DS90UB901QSQ/NPB
Description
IC SER/DESER 10-43MHZ 16B 32LLP
Manufacturer
National Semiconductor
Datasheet

Specifications of DS90UB901QSQ/NPB

Function
Serializer
Data Rate
688Mbps
Input Type
LVCMOS
Output Type
CML
Number Of Inputs
1
Number Of Outputs
1
Voltage - Supply
1.71 V ~ 1.89 V, 3 V ~ 3.6 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
32-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SYNCHRONIZING MULTIPLE CAMERAS
For applications requiring multiple cameras for frame-syn-
chronization, it is recommended to utilize the General Pur-
pose Input/Output (GPIO) pins to transmit control signals to
synchronize multiple cameras together. To synchronize the
cameras properly, the system controller needs to provide a
field sync output (such as a vertical or frame sync signal) and
the cameras must be set to accept an auxiliary sync input.
The vertical synchronize signal corresponds to the start and
end of a frame and the start and end of a field. Note this form
of synchronization timing relationship has a non-deterministic
latency. After the control data is reconstructed from the birec-
FIGURE 29. I
2
C Pass Through
33
tional control channel, there will be a time variation of the
GPIO signals arriving at the different target devices (between
the parallel links). The maximum latency delta (t1) of the GPIO
data transmitted across multiple links is 25 us.
Note: The user must verify that the timing variations between
the different links are within their system and timing specifi-
cations.
For example in the configuration shown in
The maximum time (t1) between the rising edge of GPIO (i.e.
sync signal) arriving at Camera A and Camera B is 25 us.
(Figure
30113504
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30):

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