SP6201EM5-L-3-3/TR Exar Corporation, SP6201EM5-L-3-3/TR Datasheet - Page 7

• Manufacturer Part Number: SP6201EM5-L-3-3/TR
• Description: IC REG LDO CMOS 3.3V SOT23-5
• Manufacturer: Exar Corporation

Specifications of SP6201EM5-L-3-3/TR

• Package / Case: SC-74A, SOT-753
• Regulator Topology: Positive Fixed
• Voltage - Output: 3.3V
• Voltage - Input: Up to 6V
• Voltage - Dropout (typical): 0.32V @ 200mA
• Number Of Regulators: 1
• Current - Output: 200mA
• Current - Limit (min): 300mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Polarity: Dual
• Input Voltage Max: 7 V
• Output Voltage: - 0.6 V to + 1 V
• Output Type: Adjustable, Fixed
• Dropout Voltage (max): 500 mV
• Line Regulation: 0.03 V
• Load Regulation: 0.14 %
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Reference Voltage: 1.25 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Date: 5/19/06 Rev B
An accurate Vout good indicator is provided on
all the fixed output version devices, pin 4 (RSN),
Figure 1. This is an open drain, logic output that
can be used to hold a microprocessor or micro-
controller in a RESET condition when it's power
supplied by Vout is 4% out of nominal regula-
tion. A 1% hysteresis is included in the Reset
Not function, so that false alarms are not issued
as a result of LDO's output noise. The Reset Not
function reacts in 10 to 50µs.
Adjustable Output Version
The adjustable version can be programmed to
any voltage from 2.7V to 6V for the industrial
temperature range; 2.5V to 6V for the commer-
cial temperature range. The output can not be
programmed below 2.5V due a headroom re-
striction. Since the bandgap is bootstrapped to
the output, the output voltage must be above the
minimum bandgap supply voltage. The bandgap
requires 2.7V or greater at -40°C and requires
2.5V or greater at 0°C.
The regulator's output can be adjusted to a
specific output voltage by using two external
resistors, Figure 2. The resistor's set the output
voltage based on the following equation:
Resistor values are not critical because the ADJ
node has a high input impedance, but for best
results use resistors of 470kΩ or less. A capaci-
tor from ADJ to Vout pin provides improved
noise performance as is shown in the following
plot.
Reset Not (VOUT good) Output
400
300
200
100
1.0E+02
Adj, Vin = 4.3V, Vout = 3.3V (Cin = Cout = 1uF)
1.0E+03
V
Noise Performance 10Hz to 100kHz
OUT
Bypass Cap from Vout to FB (pF)
= 1.25 (R2/R1 + 1)
1.0E+04
1.0E+05
1.0E+06
SP6200/6201 100/200mA CMOS LDO Regulor
1.0E+07
7
Input Capacitor
A small capacitor, 1µF or higher, is required
from V
bypass for the LDO amplifier. Any ceramic or
tantalum capacitor may be used at the input.
Capacitor ESR (effective series resistance)
should be smaller than 3Ω.
Output Capacitor
An output capacitor is required between V
and GND to prevent oscillation. A capacitance
as low as 0.22µF can fulfill stability require-
ments in most applications. A 1µF capacitor
will ensure unconditional stability from no load
to full load over the entire input voltage, output
voltage and temperature range. Larger capacitor
values improve the regulator's transient response.
The output capacitor value may be increased
without limit. The output capacitor should have
an ESR (effective series resistance) below 5Ω
and a resonant frequency above 1MHz.
No Load Stability
The SP6200/6201 will remain stable and in
regulation with no external load (other than the
internal voltage driver) unlike many other volt-
age regulators. This is especially important in
CMOS RAM keep-alive applications.
Thermal Considerations
The SP6200 is designed to provide 100mA of
continuous current, while the SP6201 will pro-
vide 200mA of continuous current. Maximum
power dissipation can be calculated based on the
output current and the voltage drop across the
part. To determine the maximum power dissipa-
tion in the package, use the junction-to-ambient
thermal resistance of the device and the follow-
ing basic equation:
T
the die and is 125°C. T
θ
for the regulator and is layout dependent.
The actual power dissipation of the regulator
circuit can be determined using one simple
JA
J(max)
THEORY OF OPERATION: Continued
is the junction-to-ambient thermal resistance
is the maximum junction temperature of
IN
to GND to create a high frequency
P
D
=
(T
A
J(max)
is the ambient operating.
Copyright 2008 Sipex Corporation
θ
JA
- T
A
)
OUT