SST25VF020-20-4C-SAE Microchip Technology, SST25VF020-20-4C-SAE Datasheet - Page 13

• Manufacturer Part Number: SST25VF020-20-4C-SAE
• Description: IC FLASH MPF 2MBIT 20NS 8SOIC
• Manufacturer: Microchip Technology

Specifications of SST25VF020-20-4C-SAE

• Memory Type: FLASH
• Memory Size: 2M (256K x 8)
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Format - Memory: FLASH
• Speed: 20MHz
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Architecture: Sectored
• Interface Type: SPI
• Access Time: 20 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 10 mA
• Mounting Style: SMD/SMT
• Organization: 32 KB
• Ic Interface Type: SPI
• Clock Frequency: 20MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

2 Mbit SPI Serial Flash
SST25VF020
Write-Enable (WREN)
The Write-Enable (WREN) instruction sets the Write-
Enable-Latch bit to 1 allowing Write operations to occur.
The WREN instruction must be executed prior to any Write
(Program/Erase) operation. CE# must be driven high
before the WREN instruction is executed.
Write-Disable (WRDI)
The Write-Disable (WRDI) instruction resets the Write-
Enable-Latch bit and AAI bit to 0 disabling any new Write
operations from occurring. CE# must be driven high before
the WRDI instruction is executed.
Enable-Write-Status-Register (EWSR)
The Enable-Write-Status-Register (EWSR) instruction
arms the Write-Status-Register (WRSR) instruction and
opens the status register for alteration. The Enable-Write-
Status-Register instruction does not have any effect and
will be wasted, if it is not followed immediately by the Write-
Status-Register (WRSR) instruction. CE# must be driven
low before the EWSR instruction is entered and must be
driven high before the EWSR instruction is executed.
©2006 Silicon Storage Technology, Inc.
FIGURE 12: Write Enable (WREN) Sequence
FIGURE 13: Write Disable (WRDI) Sequence
SCK
CE#
SCK
CE#
SO
SO
SI
SI
MODE 3
MODE 0
MODE 3
MODE 0
HIGH IMPEDANCE
HIGH IMPEDANCE
MSB
0 1 2 3 4 5 6 7
MSB
0 1 2 3 4 5 6 7
13
04
06
1231 F12.1
1231 F11.1
S71231-07-000
Data Sheet
10/06