ATZB-900-B0R Atmel, ATZB-900-B0R Datasheet - Page 13

MOD 802.15.4/ZIGB 900MHZ RF OUT

ATZB-900-B0R

Manufacturer Part Number
ATZB-900-B0R
Description
MOD 802.15.4/ZIGB 900MHZ RF OUT
Manufacturer
Atmel
Datasheet

Specifications of ATZB-900-B0R

Frequency
779MHz ~ 787MHz, 868MHz ~ 868.6MHz, 902MHz ~ 928MHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
Home/Building Automation, Industrial Control and Monitoring
Power - Output
11dBm
Sensitivity
-110dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
15mA
Current - Transmitting
20mA
Data Interface
PCB, Surface Mount
Memory Size
128kBytes Flash, 8kBytes RAM, 4kBytes EEPROM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
Module
Wireless Frequency
4 MHz
Interface Type
UART, I2C, SPI
Operating Voltage
1.8 V to 3.6 V
Output Power
11 dBm
Operating Temperature Range
- 40 C to + 85 C
Wireless Protocol
IEEE 802.15.4
Data Rate
250Kbps
Supply Voltage Range
1.8V To 3.6V
Development Tool Type
Evaluation Module
Kit Contents
Board Docs
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATZB-900-B0RTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATZB-900-B0R
Manufacturer:
SANREX
Quantity:
82
Part Number:
ATZB-900-B0R
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
3.3
ZigBit™ 700/800/900 MHz Wireless Modules
Pin Configuration
Figure 3-2.
Table 3-6. Pin descriptions
Connector
9,22,23
Pin
10
11
12
13
14
15
1
2
3
4
5
6
7
8
ATZB-900-B0 Pinout
OSC32K_OUT
UART_RXD
UART_TXD
UART_RTS
SPI_MISO
SPI_MOSI
Pin Name
CPU_CLK
I2C_DATA
SPI_CLK
I2C_CLK
RESET
GPIO0
GPIO1
GPIO2
DGND
4 MHz signal is present on this line. While module
RTS input (Request To send) for UART hardware
RF clock output. When module is in active state,
General Purpose digital Input/Output 0
General Purpose digital Input/Output 1
General Purpose digital Input/Output 2
is in the sleeping state, clock generation is also
I
2
C serial clock input/output
UART transmit output
flow control. Active low
Reserved for stack operation
Reserved for stack operation
Reserved for stack operation
I
UART receive input
2
32.768 kHz clock output
C serial clock output
Reset input (active low)
Digital Ground
Description
stopped
(4)
(1)(2)(3)(4)(7)
.
(1)(2)(3)(4)(7)
(2)(3)(4)(7)
(2)(3)(4)(7)
(2)(3)(4)(7)
(4)(5)
(4)
(4)
(4)
(4)
(2)(3)(4)(7)
(2)(3)(4)(7)
(2)(3)(4)(7)
8227C–MCU Wireless–06/09
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
Specifications
State after
Power on
Default
tri-state
tri-state
tri-state
tri-state
tri-state
tri-state
tri-state
tri-state
3-6

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