STA5620 STMicroelectronics, STA5620 Datasheet - Page 9

• Manufacturer Part Number: STA5620
• Description: IC RF FRONT END RECEIVER 32VFQFP
• Manufacturer: STMicroelectronics

Specifications of STA5620

• Modulation Or Protocol: GPS
• Current - Receiving: 19mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2.5 V ~ 3.3 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VFQFN
• Pin Count: 32
• Screening Level: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Frequency: -
• Applications: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Lead Free Status / Rohs Status: Compliant

STA5620
3
3.1
3.2
3.3
3.4
Functional description
RFA and MIXER section
The 1575.42 MHz RF signal at the output of the external SAW filter is amplified by a RF
amplifier (RFA) and then down converted by an image rejection mixer.
The good performances of the cascade configuration and the technology choice guarantee
a noise figure better than 4.5 dB in typical conditions. In fact, the RFA gain is high enough to
minimize the effects on the noise figure of the following integrated stages.
The linearity of the RFA and Mixer section ensures immunity to RF blockers close to the
GPS signal. Then it allows the use of low quality external pre-selection filters.
Two ninety degrees out of phase signals are derived from the VCO and send to the input of
the image rejection mixer. A minimum image rejection ratio of 20 dB is guaranteed.
The chosen IF frequency is 4f
IF section
The output of the mixer combiner is processed through an integrated filter able to select the
GPS L1 bands. The IF filter cuts any out-of-band signal including the mixer products. In
addition it acts as an anti-aliasing filter for the A/D converter. An attenuation of 20 dB is
guaranteed at 12f
The IF filter characteristic is calibrated by an internal loop which compensates process,
temperature and voltage variations.
In order to let the baseband reconstruct the received information, the IF filter must not
introduce an excessive phase shift within the signal bandwidth.
Variable gain amplifiers
A cascade of variable gain amplifiers and the relevant control circuit balance the system
gain in relationship to the RF input signal strength. In that way the signal level at the input of
the A/D converter is suitably compensated.
The device is able to self-adjust the AGC gain by integrating the MAG output by a dedicated
circuit in order to obtain 33 % of MAG bit duty cycle. The loop is compensated by an
external capacitor connected to the AGC_CTRL pin. The relevant voltage is used to control
the variable gain amplifiers.
The internal loop can be by-passed by setting a voltage to the AGC_CTRL input pin. A
dynamic range of around 55 dB is typically achieved.
A/D converter
The task of the A/D converter is to determine the sign and the magnitude of the received
signal. The A/D converter sampling frequency is 16f
Those baseband chips with just one bit input will use only the sign bit. In that case the
AGC_CTRL pin must be connected to ground through an external capacitor (~ 10 µF).
o
= 12.276 MHz.
o
= 4.092 MHz.
o
= 16.368 MHz.
Functional description
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