TEA5766UK/N1-G ST-Ericsson Inc, TEA5766UK/N1-G Datasheet - Page 21

• Manufacturer Part Number: TEA5766UK/N1-G
• Description: IC FM STEREO RADIO W/RDS 25WLCSP
• Manufacturer: ST-Ericsson Inc

Specifications of TEA5766UK/N1-G

• Frequency: 76MHz ~ 108MHz
• Sensitivity: -111dBm
• Modulation Or Protocol: FM
• Applications: FM Radio Receiver
• Current - Receiving: 17mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2.6 V ~ 3.6 V
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 25-WLCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Data Rate - Maximum: -
• Other names: 935281564023

NXP Semiconductors
TEA5766UK_1
Product data sheet
8.2.6 Frequency ready: FRRFLAG
8.2.7 Band limit: BLFLAG
8.3 Interrupt line: pin INTX
After a search, a preset or an AF update the threshold for comparison is switched to the
hysteresis level. The hysteresis level is set by the combination of SSL bits and the LHSW
bit, which results in a hysteresis as shown in
automatically and compares the level each 500 s with the hysteresis level. The
LEVFLAG bit is set if the RSSI level drops below the threshold level set by the SSL bits in
combination with the LHSW bit. The hardware interrupt is only generated if the
corresponding mask bit is set. With the LHSW bit a small or a large hysteresis can be
selected, which results in the levels of the left RSSI hysteresis threshold column for
LHSW = 0 and in the right RSSI hysteresis threshold column (see
Remark: when a search or preset is done with the ADC level set to 3 then when the
algorithm has finished, the threshold level is set to 0. Hence the LEVFLAG will never be
set.
The LEVFLAG bit is cleared by a read of the INTMSK byte 1R, or by starting the tuning
algorithm.
The frequency ready flag bit is set when the automatic tuning has finished a search, a
preset or an RDS AF update. The function of this bit is described in
The FRRFLAG is cleared by a read of byte 1R.
The band limit bit BLFLAG is set when the automatic tuning has detected the end of the
tuning band or when the PLL cannot lock on a certain frequency. The description of this bit
is in
The interrupt line driver is a MOS transistor with a nominal sink current of 900 A, it is
pulled HIGH by an 18 k resistor connected to pin VREFDIG. The interrupt line can be
connected to another similar device with an interrupt output and an 18 k pull-up resistor,
providing a wired-OR function. This allows any of the drivers to pull the line LOW by
sinking the current as specified in
generates an interrupt.
Table 5
and
Table
Rev. 01 — 22 March 2007
6. This bit is cleared by a read of byte 1R.
Section
13.4. So when a flag is set and not masked it
Table
20. Then the level ADC starts to run
TEA5766UK
Stereo FM radio + RDS
Table
Table 5
© NXP B.V. 2007. All rights reserved.
19).
and
Table
20 of 59
6.