ATA3741P2-TGQY Atmel, ATA3741P2-TGQY Datasheet - Page 16

• Manufacturer Part Number: ATA3741P2-TGQY
• Description: IC UHF ASK/FSK RECEIVER 20SOIC
• Manufacturer: Atmel

Specifications of ATA3741P2-TGQY

• Frequency: 300MHz ~ 450MHz
• Sensitivity: -108dBm
• Data Rate - Maximum: 10 kBaud
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, TPM, Security Systems
• Current - Receiving: 7mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Other names: ATA3741P2-TGQYTR

Figure 5-9.
Figure 5-10. Steady L State Limited DATA Output Pattern after Transmission
5.4.2
16
ATA3741
Switching the Receiver Back to Sleep Mode
Dem_out
Enable IC
Bit check
Dem_out
DATA
DATA
Debouncing of the Demodulator Output
Sleep mode
After the end of a data transmission, the receiver remains active and random noise pulses
appear at pin DATA. The edge-to-edge time period t
equal to or slightly higher than T
The receiver can be set back to polling mode via pin DATA or via pin ENABLE.
When using pin DATA, this pin must be pulled to low by the connected microcontroller for the
period t1.
5-15 on page
t1 is not limited but it is recommended not to exceed the specified value to prevent erasing the
reset marker. This item is explained in more detail in Section
page
OPMODE register to 1. Only one sync pulse (t3) is issued.
The duration of the OFF command is determined by the sum of t1, t2 and t10. After the OFF
command, the sleep time T
The resulting time constant
exceeded to ensure proper operation.
If the receiver is set to polling mode via pin ENABLE, an “L” pulse (T
pin.
pulse, the sleep time T
held to “L”. If the receiver is polled exclusively by a microcontroller, T
“0” to enable an instantaneous response time. This command is the faster option than via pin
DATA, but at the cost of an additional connection to the microcontroller.
Lim_min
Figure 5-12 on page 17
17. Setting the receiver to sleep mode via DATA is achieved by programming bit 1 of the
CV_Lim < Lim_max
Figure 5-11 on page 17
t
ee
Bit check mode
22). The minimum value of t1 depends on the BR_Range. The maximum value for
Sleep
tmin1
CV_Lim < Lim_min or CV_Lim
elapses. The receiver remains in sleep mode as long as ENABLE is
Sleep
illustrates the timing of that command. After the positive edge of this
together with an optional external pull-up resistor may not be
DATA_min
elapses. Note that the capacitive load at pin DATA is limited.
Receiving mode
illustrates the timing of the OFF command (see also
t
ee
.
Lim_max
tmin2
ee
of the majority of these noise pulses is
tmin2
“Configuration of the Receiver” on
t
DATA_L_max
Sleep
Doze
) must be issued at that
can be programmed to
4899B–RKE–10/06
Figure