AD8342ACPZ-REEL7 Analog Devices Inc, AD8342ACPZ-REEL7 Datasheet - Page 14

• Manufacturer Part Number: AD8342ACPZ-REEL7
• Description: IC MIXER SIGE 500MHZ 16LFCSP
• Manufacturer: Analog Devices Inc
• Series: AD8342r

Specifications of AD8342ACPZ-REEL7

• Rf Type: Cellular, ISM
• Frequency: 0Hz ~ 2.4GHz
• Number Of Mixers: 1
• Gain: 3.7dB
• Noise Figure: 12.2dB
• Secondary Attributes: Up/Down Converter
• Current - Supply: 58mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Package / Case: 16-VFQFN, CSP Exposed Pad
• Frequency Range: 3GHz
• Supply Voltage Range: 4.75V To 5.25V
• Rf Ic Case Style: LFCSP
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 1 - Unlimited
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: AD8342ACPZ-REEL7

AD8342
CIRCUIT DESCRIPTION
The AD8342 is an active mixer, optimized for operation within
the input frequency range of near dc to 2.4 GHz. It has a
differential, high impedance RF input that can be terminated or
matched externally. The RF input can be driven either single-
ended or differentially. The LO input is a single-ended 50 Ω
input. The IF outputs are differential open-collectors. The mixer
current can be adjusted by the value of an external resistor to
optimize performance for gain, compression, and intermodula-
tion, or for low power operation. Figure 39 shows the basic
blocks of the mixer, including the LO buffer, RF voltage-to-
current converter, bias cell, and mixing core.
The RF voltage to RF current conversion is done via a resistively
degenerated differential pair. To drive this port single-ended,
the RFCM pin should be ac-grounded while the RFIN pin is ac-
coupled to the signal source. The RF inputs can also be driven
differentially. The voltage-to-current converter then drives the
emitters of a four-transistor switching core. This switching core
is driven by an amplified version of the local oscillator signal
connected to the LO input. There are three limiting gain stages
between the external LO signal and the switching core. The first
stage converts the single-ended LO drive to a well-balanced
differential drive. The differential drive then passes through two
more gain stages, which ensures that a limited signal drives the
switching core. This affords the user a lower LO drive
requirement, while maintaining excellent distortion and
compression performance. The output signal of these three LO
gain stages drives the four transistors within the mixer core to
commutate at the rate of the local oscillator frequency. The
output of the mixer core is taken directly from its open
collectors. The open-collector outputs present a high
impedance at the IF frequency. The conversion gain of the
mixer depends directly on the impedance presented to these
open collectors. In characterization, a 100 Ω load was presented
to the part via a 2:1 impedance transformer.
The device also features a power-down function. Application of
a logic low at the PWDN pin allows normal operation. A high
logic level at the PWDN pin shuts down the AD8342. Power
consumption when the part is disabled is less than 10 mW.
The bias for the mixer is set with an external resistor (R
from the EXRB pin to ground. The value of this resistor directly
affects the dynamic range of the mixer. The external resistor
should not be lower than 1.82 kΩ. Permanent damage to the
BIAS
)
Rev. B | Page 14 of 24
part can result if values below 1.8 kΩ are used. This resistor sets
the dc current through the mixer core. The performance effects
of changing this resistor can be seen in the Typical Performance
Characteristics section.
As shown in Figure 40, the IF output pins, IFOP and IFOM, are
directly connected to the open collectors of the NPN transistors
in the mixer core so the differential and single-ended
impedances looking into this port are relatively high, on the
order of several kΩ. A connection between the supply voltage
and these output pins is required for proper mixer core
operation.
The AD8342 has three pins for the supply voltage: VPDC,
VPMX, and VPLO. These pins are separated to minimize or
eliminate possible parasitic coupling paths within the AD8342
that could cause spurious signals or reduced interport isolation.
Consequently, each of these pins should be well bypassed and
decoupled as close to the AD8342 as possible.
Figure 39. Simplified Schematic Showing the Key Elements of the AD8342
RFIN
Figure 40. AD8342 Simplified Schematic
IFOP IFOM
RFCM
RFIN
VPDC
COMM
TO
V
I
EXTERNAL
RESISTOR
INPUT
BIAS
BIAS
LO
VPLO
PWDN
RFCM
IFOP
IFOM
LOIN