71M6511-IGTR/F Maxim Integrated Products, 71M6511-IGTR/F Datasheet - Page 52

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71M6511-IGTR/F

Manufacturer Part Number
71M6511-IGTR/F
Description
IC ENERGY METER RESIDENT 64-LQFP
Manufacturer
Maxim Integrated Products
Type
Metering SoCr
Datasheet

Specifications of 71M6511-IGTR/F

Mounting Style
SMD/SMT
Package / Case
LQFP-64
Core
80515 MPU
Data Bus Width
32 bit
Data Ram Size
7 KB
Device Million Instructions Per Second
5 MIPS
Interface Type
UART
Maximum Clock Frequency
70 Hz
Maximum Operating Temperature
+ 85 C
Number Of Programmable I/os
12
Operating Supply Voltage
3.3 V
Processor Series
71M6511
Program Memory Size
64 KB
Program Memory Type
Flash
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
71M6511-IGTR/F
Manufacturer:
Maxim Integrated
Quantity:
10 000
Power-Up: After power-up, the 71M6511/6511H is in reset as long as V1 < VBIAS. As soon as V1 exceeds VBIAS, the reset
timer is started which takes the MPU out of reset after 4100 oscillator cycles (see Figure 20). The MPU then initiates its pre-
boot phase lasting 32 cycles. The supply current will be low but not zero during power-up. It will increase, once V1 exceeds
VBIAS and will increase to the nominal value once the preboot phase starts. The supply current may then be reduced under
firmware control, following the steps specified in Battery Operation and Power Save Modes.
Battery Operation
When V1 is lower than VBIAS, the external battery will power the following parts of the 71M6511/6511H:
Power Save Modes
In normal mode of operation, running on 3.3V supply, various resources of the 71M6511/6511H may be shut down by the
MPU firmware in order to reduce power consumption while other essential resources such as UARTs may remain active.
Table 60 outlines these resources and their typical current consumption (based on initial condition MPU_DIV = 0).
Power Saving Measure
*) This bit is to be used with caution! Inadvertently setting this bit will inhibit access to the part with the ICE interface and thus
preclude flash erase and programming operations.
Page: 52 of 98
A Maxim Integrated Products Brand
POWER
DOWN
RTC
Crystal oscillator circuitry
MPU XRAM
WD_OVF bit
PWR
UP
Figure 20: Timing Diagram for Voltages, Current and Operation Modes after Power-Up
Disable the CE
Disable the ADC
Disable clock test output CKTEST
Disable emulator clock
Set flash read pulse timing to 33 ns
Disable the LCD voltage boost circuitry
Disable RTM outputs
Increase the clock divider for the MPU
V2P5
V1
V1 > VBIAS
RESET TIMER
125ms
© 2005–2010 Teridian Semiconductor Corporation
Table 60: Power Saving Measures
BOOT
PRE-
1ms
Software Control
V3P3
FIRMWARE HAS CONTROL OVER CHIP...
Single-Phase Energy Meter IC
SUPPLY CURRENT
LCD_BSTEN = 0
ECK_DIS = 1 *)
CKOUTDIS = 1
MPU_DIV = X
FLASH66Z =1
ADC_DIS = 1
RTM_EN = 0
Savings
Typical
CE_EN = 0
71M6511/71M6511H
DATA SHEET
0.4mA/MHz
0.16mA
0.04mA
0.01mA
1.8mA
0.6mA
0.1mA
0.9mA
nominal
0mA
1.5V
3.3V
NOVEMBER 2010
0V
V2.7

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