DS1238AS-5 Maxim Integrated Products, DS1238AS-5 Datasheet - Page 7

• Manufacturer Part Number: DS1238AS-5
• Description: IC MICRO MANAGER 5% 16-SOIC
• Manufacturer: Maxim Integrated Products
• Series: MicroManagerr
• Type: Battery Backup Circuitr

Specifications of DS1238AS-5

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active High/Active Low
• Reset Timeout: 40 ms Minimum
• Voltage - Threshold: 4.62V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: DS1238AS5

MEMORY BACKUP
The DS1238A provides all of the necessary functions required to battery back a static RAM. First, an
internal switch is provided to supply SRAM power from the primary 5-volt supply (V
external battery (V
power monitor section is used to hold the chip enable output (
0.7 volts of V
battery in violation of UL standards. Write protection occurs as V
high, or the period t
prevents the corruption of data. If
be unconditionally disabled within t
maximum propagation delay of 20 ns. NO TAG shows a typical nonvolatile SRAM application.
FRESHNESS SEAL
In order to conserve battery capacity during initial construction of an end system, the DS1238A provides
a freshness seal that electrically disconnects the battery. This means that upon battery attachment, the
V
when the battery is first attached, and V
and cannot be invoked again without subsequent removal and reattachment of the battery.
POWER SWITCHING
When larger operating currents are required in a battery-backed system, the internal switching devices of
the DS1238A may be too small to support the required load through V
For these applications, the PF output is provided to gate external power switching devices. As shown in
Figure 8, power to the load is switched from V
power-up. The DS1336 is designed to use the PF output to switch between V
better leakage and switchover performance than currently available discrete components. The transition
threshold for PF is set to the external battery voltage V
Any load applied to the PF pin by an external switch will be supplied by the battery. Therefore, if a
discrete switch is used, this load should be taken into consideration when sizing the battery.
NONVOLATILE SRAM Figure 7
CEI
CCO
is low at the time power-fail detection occurs,
output will remain inactive until V
BAT
. The output voltage diode drop from V
BAT
CE
expires. This delay of write protection until the current memory cycle is completed
), whichever is greater. Second, the same power-fail detection described in the
CEO
CF
. During nominal supply conditions
CC
is in an inactive state at the time of V
CC
is not present. Once V
is applied. This prevents V
CC
7 of 13
to battery on power-down, and from battery to V
CEO
BAT
BAT
is held in its present state until
, allowing a smooth transition between sources.
(0.7V) is necessary to prevent charging of the
CEO
CC
) to within 0.3 volts of V
is applied, the freshness seal is broken
CC
CCO
falls below V
CCO
with a reasonable voltage drop.
from powering other devices
CEO
CC
BAT
fail detection,
will follow
and V
CCTP
CC
CEI
as specified. If
CC
CC
) or from an
. It provides
or to within
CEI
is returned
CEO
DS1238A
with a
CC
will
on