BD45251G-TR Rohm Semiconductor, BD45251G-TR Datasheet - Page 5

IC DETECTOR VOLT 2.5V TMR 5SSOP

BD45251G-TR

Manufacturer Part Number
BD45251G-TR
Description
IC DETECTOR VOLT 2.5V TMR 5SSOP
Manufacturer
Rohm Semiconductor
Type
Simple Reset/Power-On Resetr
Datasheets

Specifications of BD45251G-TR

Number Of Voltages Monitored
1
Output
Open Drain or Open Collector
Reset
Active Low
Reset Timeout
90 ms Minimum
Voltage - Threshold
2.5V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
5-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
 Reference Data
 Explanation of Operation
 Timing Waveform
© 2009 ROHM Co., Ltd. All rights reserved.
BD45□□□G, BD46□□□G series
www.rohm.com
Example: the following shows the relationship between the input voltages VDD, the output voltage VOUT and ER terminal
when the input power supply voltage VDD is made to sweep up and sweep down (the circuits are those in Fig. 12 and 13).
For both the open drain type (Fig.15) and the CMOS output type (Fig.16), the detection and release voltages are used as
threshold voltages. When the voltage applied to the VDD pins reaches the applicable threshold voltage, the VOUT terminal
voltage switches from either “High” to “Low” or from “Low” to “High”. Because the BD45□□□G series uses an open drain output
type, it is possible to connect a pull-up resistor to VDD or another power supply [The output “High” voltage (VOUT) in this case
becomes VDD or the voltage of the other power supply].
V
V
ER
DD
OUT
GND
V
Examples of Leading (TPLH) and Falling (TPHL) Output
*This data is for reference only.
V
V
V
DD
V
Fig.15 (BD45□□□G Type Internal Block Diagram)
0V
OH
OL
EH
DET
The figures will vary with the application, so please confirm actual operating conditions before use.
V
+ΔV
OPL
V
Vref
V
Part Number
DET
DET
BD45275G
BD46275G
DD
R3
t
PHL
t
R1
R2
PLH
③ ④
t
Fig.17
PHL
t
PLH
Circuit Counter
Oscillation
t
Timer
PHL
V
ER
DD
tPLH[ms]
=2.2V3.2V
50
50
Q1
t
PLH
V
V
OUT
DD
1
2
3
4
5
6
7
Reset
5/9
These time changes by the application and use it, please verify
and confirm using practical applications.
after over the operating limit voltage (VOPL) until TPHL. There fore
it is possible that the reset signal is not outputted when the rise
time of VDD is faster than TPHL.
voltage (VDET + ∆VDET), the output voltages will switch to Low.
counter timer start and VOUT switches from L to H.
VOUT comes to “L” after tPLH delay time. Therefore, a time when
ER terminal is “H” is necessary for 100µsec or more.
to operate, a delay of tPLH occurs, and VOUT switches from “L” to
“H”.
power supply is powered down or when there is a power supply
fluctuation, VOUT switches to L (with a delay of tPHL).
release voltage is known as the hysteresis width (∆VDET). The
system is designed such that the output does not flip-flop with
power supply fluctuations within this hysteresis width, preventing
malfunctions due to noise.
When the power supply is turned on, the output is unsettled from
When VDD is greater than VOPL but less than the reset release
If VDD exceeds the reset release voltage (VDET + ∆VDET), the
When more than the high level voltage is supplied ER terminal,
When the ER terminal switches to Low, the counter timer starts
The potential difference between the detection voltage and the
If VDD drops below the detection voltage (VDET) when the
GND
V
DD
V
Fig.16 (BD46□□□G Type Internal Block Diagram)
DD
tPHL[µs]
=3.2V2.2V
Vref
18
18
R3
R1
R2
Circuit Counter
Oscillation
Timer
ER
Technical Note
2009.05 - Rev.C
Q2
Q1
V
OUT
Reset

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