LTC699CS8#PBF Linear Technology, LTC699CS8#PBF Datasheet - Page 3

IC MPU SUPERVISORY CIRCUIT 8SOIC

LTC699CS8#PBF

Manufacturer Part Number
LTC699CS8#PBF
Description
IC MPU SUPERVISORY CIRCUIT 8SOIC
Manufacturer
Linear Technology
Type
Simple Reset/Power-On Resetr
Datasheet

Specifications of LTC699CS8#PBF

Number Of Voltages Monitored
1
Output
Open Drain or Open Collector
Reset
Active Low
Reset Timeout
140 ms Minimum
Voltage - Threshold
4.65V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC699CS8#PBFLTC699CS8
Manufacturer:
LINEAR/凌特
Quantity:
20 000
PI FU CTIO S
TYPICAL PERFOR
Microprocessor Reset
The LTC699 uses a bandgap voltage reference and a
precision voltage comparator C1 to monitor the 5V supply
input V
the reset voltage threshold, the RESET output is forced to
active low state. The reset voltage threshold accounts for
a 5% variation on V
active low when V
up, the RESET signal is held active low for a minimum of
140ms after reset voltage threshold is reached to allow the
power supply and microprocessor to stabilize. On power-
V
with a 0.1 F capacitor.
GND: Ground pin.
RESET: Open drain output for P reset control. When V
falls below the reset voltage threshold (4.65V typically),
RESET goes active low. After V
pulse generator forces RESET to remain active low for a
minimum of 140ms . When the watchdog timer is enabled
A
CC
PPLICATI
U
: +5V supply input. The V
5
4
2
1
0
3
RESET Output Voltage vs
Supply Voltage
0
CC
T
EXTERNAL PULLUP = 10 A
A
= 25°C
(see BLOCK DIAGRAM). When V
U
1
SUPPLY VOLTAGE (V)
O
CC
2
U
falls below 4.65V typical. On power-
CC
U
S
, so the RESET output becomes
3
I FOR ATIO
U
W
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
CC
4
CC
A
LTC699 G01
pin should be bypassed
U
returns to 5V, the reset
5
CE
W
C
HARA TERISTICS
CC
232
224
200
184
216
208
192
–50
falls below
Reset Active Time vs
Temperature
V
U
CC
–25
= 5V
C
0
CC
TEMPERATURE (
25
down, the RESET signal remains active low even with V
as low as 1V. This capability helps hold the microproces-
sor in stable shutdown condition. Figure 1 shows the
timing diagram of the RESET signal.
The precision voltage comparator, C1, typically has 40mV
of hysteresis which ensures that glitches at V
activate the RESET output. Response time is typically
10 s. To help prevent mistriggering due to transient loads,
V
leads trimmed as short as possible.
but not serviced prior to the time-out period, the reset
pulse generator also forces RESET to active low for a mini-
mum of 140ms for every time-out period (see Figure 2).
WDI: Watchdog Input, WDI, is a three level input. Driving
WDI either high or low for longer than the watchdog time-
out period forces RESET low. Floating WDI disables the
Watchdog Timer. The timer resets itself with each transition
of the Watchdog Input (see Figure 2).
CC
50
pin should be bypassed with a 0.1 F capacitor with the
°
75
C)
100 125
LTC699 G02
4.66
4.65
4.64
4.63
4.62
4.60
4.61
–50
Reset Voltage Threshold vs
Temperature
–25
0
TEMPERATURE (
25
50
LTC699
CC
°
C)
75
pin do not
100
LTC699 G03
3
CC
125

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