AD623AN Analog Devices Inc, AD623AN Datasheet - Page 17

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AD623AN

Manufacturer Part Number
AD623AN
Description
IC AMP INST R-R LP 8DIP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD623AN

Slew Rate
0.3 V/µs
Mounting Type
Through Hole
Rohs Status
RoHS non-compliant
Amplifier Type
Instrumentation
Number Of Circuits
1
Output Type
Rail-to-Rail
-3db Bandwidth
800kHz
Current - Input Bias
17nA
Voltage - Input Offset
25µV
Current - Supply
375µA
Voltage - Supply, Single/dual (±)
2.7 V ~ 12 V, ± 2.5 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
No. Of Amplifiers
1
Bandwidth
0.8MHz
Amplifier Case Style
DIP
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Programmable Gain Max
1000
Current - Output / Channel
-
Gain Bandwidth Product
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Part Number
Manufacturer
Quantity
Price
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AD623AN
Manufacturer:
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Quantity:
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Manufacturer:
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Quantity:
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Part Number:
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INPUT AND OUTPUT OFFSET VOLTAGE
The low errors of the AD623 are attributed to two sources,
input and output errors. The output error is divided by the
programmed gain when referred to the input. In practice,
the input errors dominate at high gains and the output errors
dominate at low gains. The total V
as the following:
RTI offset errors and noise voltages for different gains are
shown in Table 6.
INPUT PROTECTION
Internal supply referenced clamping diodes allow the input,
reference, output, and gain terminals of the AD623 to safely
withstand overvoltages of 0.3 V above or below the supplies.
This is true for all gains and for power on and power off. This
last case is particularly important because the signal source
and amplifier may be powered separately.
If the overvoltage is expected to exceed this value, the current
through these diodes should be limited to about 10 mA using
external current limiting resistors (see Figure 44). The size of
this resistor is defined by the supply voltage and the required
overvoltage protection.
RF INTERFERENCE
All instrumentation amplifiers can rectify high frequency out-
of-band signals. Once rectified, these signals appear as dc offset
errors at the output. The circuit in Figure 45 provides good RFI
suppression without reducing performance within the pass band of
Table 6. RTI Error Sources
Gain
1
2
5
10
20
50
100
1000
Total Error RTI = Input Error + ( Output Error / G )
Total Error RTO = ( Input Error × G ) + Output Error
V
V
AD623A
1200
700
400
300
250
220
210
200
OVER
OVER
Maximum Total Input Offset Error (μV)
R
R
I = 10mA MAX
LIM
LIM
Figure 44. Input Protection
R
G
AD623B
600
350
200
150
125
110
105
100
+V
–V
OS
S
S
AD623
R
for a given gain is calculated
LIM
=
V
OVER
10mA
–V
S
OUTPUT
+ 0.7V
AD623A
12
7
4
3
2.5
2.2
2.1
2
Maximum Total Input Offset Drift (μV/°C)
Rev. D | Page 17 of 24
the in-amp. Resistor R1 and Capacitor C1 (and likewise, R2 and
C2) form a low-pass RC filter that has a −3 dB bandwidth equal
to F = 1/(2 π R1C1 ). Using the component values shown, this
filter has a −3 dB bandwidth of approximately 40 kHz. Resistors
R1 and R2 were selected to be large enough to isolate the input of
the circuit from the capacitors, but not large enough to significantly
increase the noise of the circuit. To preserve common-mode rejection
in the amplifier’s pass band, Capacitors C1 and C2 need to be 5%
or better units, or low cost 20% units can be tested and binned
to provide closely matched devices.
Capacitor C3 is needed to maintain common-mode rejection at
the low frequencies. R1/R2 and C1/C2 form a bridge circuit whose
output appears across the input pins of the in-amp. Any mismatch
between C1 and C2 unbalances the bridge and reduces the
common-mode rejection. C3 ensures that any RF signals are
common mode (the same on both in-amp inputs) and are not
applied differentially. This second low-pass network, R1 + R2 and
C3, has a −3 dB frequency equal to 1/(2 π (R1 + R2) (C3)). Using a
C3 value of 0.047 μF, the −3 dB signal bandwidth of this circuit is
approximately 400 Hz. The typical dc offset shift over frequency is
less than 1.5 μV and the circuit’s RF signal rejection is better than
71 dB. The 3 dB signal bandwidth of this circuit may be increased
to 900 Hz by reducing Resistors R1 and R2 to 2.2 kΩ. The
performance is similar to using 4 kΩ resistors, except that the
circuitry preceding the in-amp must drive a lower impedance load.
AD623B
11
6
3
2
1.5
1.2
1.1
1
+IN
NOTES:
1. LOCATE C1 TO C3 AS CLOSE TO THE INPUT PINS AS POSSIBLE.
–IN
4.02kΩ
4.02kΩ
1%
1%
R1
R2
Figure 45. Circuit to Attenuate RF Interference
0.047µF
1000pF
1000pF
5%
5%
C1
C3
C2
AD623A and AD623B
62
45
38
35
35
35
35
35
Total Input Referred Noise (nV/√Hz)
R
G
0.33µF
0.33µF
AD623
+V
+V
S
S
0.01µF
0.01µF
REFERENCE
V
OUT
AD623

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