ISL28270IAZ Intersil, ISL28270IAZ Datasheet - Page 12

IC INSTR AMP RRIO DUAL 16-QSOP

ISL28270IAZ

Manufacturer Part Number
ISL28270IAZ
Description
IC INSTR AMP RRIO DUAL 16-QSOP
Manufacturer
Intersil
Datasheets

Specifications of ISL28270IAZ

Amplifier Type
Instrumentation
Number Of Circuits
2
Output Type
Rail-to-Rail
Slew Rate
0.5 V/µs
-3db Bandwidth
240kHz
Current - Input Bias
500pA
Voltage - Input Offset
35µV
Current - Supply
120µA
Current - Output / Channel
29mA
Voltage - Supply, Single/dual (±)
2.4 V ~ 5.5 V, ±1.2 V ~ 2.75 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
No. Of Amplifiers
2
Input Offset Voltage
150µV
Bandwidth
240kHz
Amplifier Output
Rail To Rail
Cmrr
110dB
Supply Voltage Range
2.4V To 5.5V
Supply Current
78µA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Gain Bandwidth Product
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL28270IAZ
Manufacturer:
INTERSIL
Quantity:
20 000
In Figure 28, the FB+ pin and one end of resistor RG are
connected to GND. With this configuration, the gain equation
(Equation 1) is only true for a positive swing in VIN; negative
input swings will be ignored because the output will be at
ground.
Reference Connection
Unlike a three op-amp in-amp realization, a finite series
resistance seen at the REF terminal does not degrade the
high CMRR performance, eliminating the need for an
additional external buffer amplifier. Figure 29 uses the FB+
pin to provide a high impedance REF terminal.
.
The FB+ pin is used as a REF terminal to center or to adjust
the output. Because the FB+ pin is a high impedance input,
V
V
V
V
FIGURE 29. GAIN SETTING AND REFERENCE CONNECTION
IN
FIGURE 28. GAIN IS SET BY TWO EXTERNAL RESISTORS,
OUT
IN
OUT
VCM
VCM
=
=
IN+ IN-
=
=
IN+ IN-
2.9V to 5V
REF
IN+
IN-
IN+
IN-
1
1
+
+
------- -
R
------- -
R
R
R
R
R
R
G
G
F
F
F
1
2
R
AND R
(
V
R
V
G
IN
G
IN
)
+
G
1
+
FB+
FB-
FB+
FB-
IN+
IN-
IN+
IN-
------- -
R
R
12
G
F
2.4V TO 5V
2.4V to 5V
+
+
+
+
-
-
-
-
(
ISL28270
ISL28270
V
R
R
REF
F
F
V+
V+
V-
V-
)
EN
EN
ISL28270, ISL28273, ISL28470
EN
EN
(EQ. 1)
(EQ. 2)
VOUT
VOUT
an economical resistor divider can be used to set the voltage
at the REF terminal without degrading or affecting the CMRR
performance. Any voltage applied to the REF terminal will
shift V
by resistors R
The FB+ pin can also be connected to the other end of
resistor, R
the in-amp maintains constant differential voltage across the
input terminals and feedback terminals (FB- - FB+) =
(IN+ - IN-), the transfer function of Figure 30 can be derived.
A finite resistance RS in series with the V
an output offset of V
approaches zero, Equation 3 is simplified to Equation 4 for
Figure 30. V
External Resistor Mismatches
Because of the independent pair of feedback terminals
provided by the in-amps, the CMRR is not degraded by any
resistor mismatches. Hence, unlike a three op-amp and
especially a two op-amp in-amp realization, the ISL28270,
ISL28273 and ISL28470 reduce the cost of external
components by allowing the use of 1% or more tolerance
resistors without sacrificing CMRR performance. The CMRR
will be typically 110dB regardless of the tolerance of the
resistors used. Instead, a resistor mismatch results in a
higher deviation from the theoretical gain - gain Error.
Gain Error and Accuracy
The gain error indicated in the “Electrical Specifications”
Table on page 3 is the inherent gain error alone. The gain
error specification listed does not include the gain error
contributed by the resistors. There is an additional gain error
V
V
V
OUT
OUT
IN
VCM
VREF
=
OUT
R
=
=
IN+ IN-
FIGURE 30. REFERENCE CONNECTION WITH AN
S
IN+
IN-
1
1
G
by V
. See Figure 30. Keeping the basic concept that
+
+
OUT
------- -
R
R
--------------------- -
R
F
S
G
F
R
REF
and R
+
R
G
(
is simply shifted by an amount V
G
R
V
IN
F
AVAILABLE VREF
IN
times the closed loop gain, which is set
)
G
+
*(R
+
. See Figure 29.
V
(
V
REF
S
REF
/R
FB+
FB-
IN+
IN-
G
)
). As the series resistance RS
2.4V TO 5V
+
+
-
-
ISL28270
R
F
V+
V-
EN
REF
source, adds
REF
April 13, 2007
EN
.
FN6260.2
(EQ. 3)
(EQ. 4)
VOUT

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