AD8044ARZ-14 Analog Devices Inc, AD8044ARZ-14 Datasheet - Page 11

• Manufacturer Part Number: AD8044ARZ-14
• Description: IC OPAMP VF R-R QUAD LP 14SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD8044ARZ-14

• Slew Rate: 190 V/µs
• Amplifier Type: Voltage Feedback
• Number Of Circuits: 4
• Output Type: Rail-to-Rail
• -3db Bandwidth: 160MHz
• Current - Input Bias: 2µA
• Voltage - Input Offset: 1400µV
• Current - Supply: 11.5mA
• Current - Output / Channel: 30mA
• Voltage - Supply, Single/dual (±): 3 V ~ 12 V, ±1.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Op Amp Type: Voltage Feedback
• No. Of Amplifiers: 4
• Bandwidth: 160MHz
• Supply Voltage Range: 3V To 12V
• Amplifier Case Style: SOIC
• No. Of Pins: 14
• Common Mode Rejection Ratio: 90
• Current, Input Bias: 2 μA
• Current, Input Offset: 0.2 μA
• Current, Output: 30 mA
• Harmonic Distortion: -68 dB
• Impedance, Thermal: 120 °C/W
• Number Of Amplifiers: Quad
• Package Type: SOIC-14
• Power Dissipation: 1 W
• Resistance, Input: 225 Kilohms
• Temperature, Operating, Range: -40 to +85 °C
• Voltage, Input: -0.2 to +4 V (Common-Mode)
• Voltage, Noise: 16 nV/sqrt Hz
• Voltage, Offset: 1 mV
• Voltage, Output, High: 4.975 V
• Voltage, Output, Low: 0.03 V
• Voltage, Supply: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Gain Bandwidth Product: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REV. B
Overdrive Recovery
Overdrive of an amplifier occurs when the output and/or input
range are exceeded. The amplifier must recover from this over-
drive condition. As shown in Figure 33, the AD8044 recovers
within 50 ns from negative overdrive and within 25 ns from
positive overdrive.
Circuit Description
The AD8044 is fabricated on Analog Devices’ proprietary
eXtra-Fast Complementary Bipolar (XFCB) process which
enables the construction of PNP and NPN transistors with
similar f
cally isolated to eliminate the parasitic and latch-up problems
caused by junction isolation. These features allow the construc-
tion of high frequency, low distortion amplifiers with low supply
currents. This design uses a differential output input stage to
maximize bandwidth and headroom (see Figure 34). The
smaller signal swings required on the first stage outputs (nodes
S1P, S1N) reduce the effect of nonlinear currents due to
junction capacitances and improve the distortion performance.
With this design harmonic distortion of better than –85 dB
@ 1 MHz into 100 W with V
single 5 volt supply is achieved.
The AD8044’s rail-to-rail output range is provided by a comple-
mentary common-emitter output stage. High output drive capa-
bility is provided by injecting all output stage predriver currents
directly into the bases of the output devices Q8 and Q36. Bias-
ing of Q8 and Q36 is accomplished by I8 and I5, along with a
common-mode feedback loop (not shown). This circuit topol-
ogy allows the AD8044 to drive 50 mA of output current with
the outputs within 0.5 V of the supply rails.
On the input side, the device can handle voltages from –0.2 V
below the negative rail to within 1.2 V of the positive rail. Ex-
ceeding these values will not cause phase reversal; however, the
input ESD devices will begin to conduct if the input voltages
exceed the rails by greater than 0.5 V.
Figure 33. Overdrive Recovery, VS + 5 V, V
T
s in the 2 GHz–4 GHz region. The process is dielectri-
V
A
R
R
2V/DIV
S
V
F
L
V
= +5V
= +2
= 2k
= 2k
IN
2V
1V
OUT
= 2 V p-p (Gain = +2) on a
50ns
1V/DIV
V
OUT
IN
= 4 V Step
–11–
Driving Capacitance Loads
The capacitive load drive of the AD8044 can be increased by
adding a low valued resistor in series with the load. Figure 35
shows the effects of a series resistor on capacitive drive for vary-
ing voltage gains. As the closed-loop gain is increased, the larger
phase margin allows for larger capacitive loads with less over-
shoot. Adding a series resistor with lower closed-loop gains
accomplishes this same effect. For large capacitive loads, the
frequency response of the amplifier will be dominated by the
roll-off of the series resistor and capacitive load.
V
V
V
V
IN
IN
CC
EE
N
P
Q13
R15
C7
Figure 34. AD8044 Simplified Schematic
R2
Q17
I1
R26
Q2
Q4
R5
Q40
SIP
V
EE
I10
Q3
Q5
R39
R21
SIN
Q11
R3
I2
Q22
I3
Q7
Q25
Q24
I7
Q51
Q21
R23 R27
Q39
Q27
Q50
Q47
Q31
AD8044
Q23
I11
I9
V
V
EE
C3
C9
CC
I8
I5
Q36
Q8
V
OUT