LMC6494BEM National Semiconductor, LMC6494BEM Datasheet - Page 14

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LMC6494BEM

Manufacturer Part Number
LMC6494BEM
Description
IC OP AMP QUAD CMOS R-R 14-SOIC
Manufacturer
National Semiconductor
Datasheet

Specifications of LMC6494BEM

Amplifier Type
General Purpose
Number Of Circuits
4
Output Type
Rail-to-Rail
Slew Rate
1.3 V/µs
Gain Bandwidth Product
1.5MHz
Current - Input Bias
0.15pA
Voltage - Input Offset
110µV
Current - Supply
2.6mA
Current - Output / Channel
30mA
Voltage - Supply, Single/dual (±)
2.5 V ~ 15.5 V, ±1.25 V ~ 7.75 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
-3db Bandwidth
-
Other names
*LMC6494BEM

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Application Hints
Applications that exceed this rating must externally limit the
maximum input current to
as shown in Figure 3.
RAIL-TO-RAIL OUTPUT
The approximate output resistance of the LMC6492/4 is
110Ω sourcing and 80Ω sinking at V
lated output resistance, maximum output voltage swing can
be esitmated as a function of load.
COMPENSATING FOR INPUT CAPACITANCE
It is quite common to use large values of feedback resis-
tance for amplifiers with ultra-low input current, like the
LMC6492/4.
Although the LMC6492/4 is highly stable over a wide range
of operating conditions, certain precautions must be met to
achieve the desired pulse response when a large feedback
resistor is used. Large feedback resistors with even small
values of input capacitance, due to transducers, photo-
diodes, and circuit board parasitics, reduce phase margins.
When high input impedances are demanded, guarding of the
LMC6492/4 is suggested. Guarding input lines will not only
reduce leakage, but lowers stray input capacitance as well.
(See Printed-Circuit-Board Layout for High Impedance
Work).
The effect of input capacitance can be compensated for by
adding a capacitor, C
Figure 1 ) such that:
Exceeds the 5V Supply in Figure 3 Causing
FIGURE 3. R
Voltages Exceeding the Supply Voltages
FIGURE 2. A
No Phase Inversion Due to R
I
f
, around the feedback resistors (as in
Input Current Protection for
±
7.5V Input Signal Greatly
±
5 mA with an input resistor (R
(Continued)
s
= 5V. Using the calcu-
01204910
I
01204909
I
)
14
or
Since it is often difficult to know the exact value of C
be experimentally adjusted so that the desired pulse re-
sponse is achieved. Refer to the LMC660 and LMC662 for a
more detailed discussion on compensating for input capaci-
tance.
CAPACITIVE LOAD TOLERANCE
All rail-to-rail output swing operational amplifiers have volt-
age gain in the output stage. A compensation capacitor is
normally included in this integrator stage. The frequency
location of the dominant pole is affected by the resistive load
on the amplifier. Capacitive load driving capability can be
optimized by using an appropriate resistive load in parallel
with the capacitive load (see Typical Curves).
Direct capacitive loading will reduce the phase margin of
many op-amps. A pole in the feedback loop is created by the
combination of the op-amp’s output impedance and the ca-
pacitive load. This pole induces phase lag at the unity-gain
crossover frequency of the amplifier resulting in either an
oscillatory or underdamped pulse response. With a few ex-
ternal components, op amps can easily indirectly drive ca-
pacitive loads, as shown in Figure 5.
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC6492/4, typically
150 fA, it is essential to have an excellent layout. Fortu-
nately, the techniques of obtaining low leakages are quite
FIGURE 4. Cancelling the Effect of Input Capacitance
FIGURE 5. LMC6492/4 Noninverting Amplifier,
Compensated to Handle Capacitive Loads
R
1
C
IN
≤ R
2
C
f
01204912
01204911
IN
, C
f
can

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