AD8557ARZ Analog Devices Inc, AD8557ARZ Datasheet
AD8557ARZ
Specifications of AD8557ARZ
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AD8557ARZ Summary of contents
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FEATURES Very low offset voltage: 12 μV maximum over temperature Very low input offset voltage drift: 65 nV/°C maximum High CMRR minimum Digitally programmable gain and output offset voltage Gain range from 28 to 1300 Qualified for automotive ...
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AD8557 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution.................................................................................. 5 Pin Configurations and Function Descriptions ...
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SPECIFICATIONS VDD = 5.0 V, VSS = 0 2.5 V, VOUT = 2.5 V, gain = 28 Table 1. Parameter INPUT STAGE Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Offset Current ...
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AD8557 VDD = 2.7 V, VSS = 0 1.35 V, VOUT = 1.35 V, gain = 28 Table 2. Parameter INPUT STAGE Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Offset Current ...
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ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage 6 V Input Voltage VSS − 0 VDD + 0 Differential Input Voltage ±6.0 V Output Short-Circuit Duration to Indefinite VSS or VDD ESD (Human Body Model) ...
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AD8557 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD 1 8 AD8557 DIGOUT 2 7 TOP VIEW DIGIN 3 6 (Not to Scale) VNEG 4 5 Figure 2. 8-Lead SOIC_N Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic SOIC_N LFCSP_VQ ...
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TYPICAL PERFORMANCE CHARACTERISTICS +125°C 5 +25°C 0 –5 –10 –15 – COMMON-MODE VOLTAGE (V) Figure 4. Input Offset Voltage vs. Common-Mode Voltage +125° +25°C –2 –4 ...
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AD8557 (nV/° Figure 10 2.7 V, −40°C ≤ ...
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VCLAMP VOLTAGE (V) Figure 16. VCLAMP Current over Temperature at V vs. VCLAMP Voltage 2.0 1.5 1.0 0 (V) SY Figure 17. Supply ...
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AD8557 140 CMRR GAIN +28 120 100 CMRR GAIN +1300 –50 – TEMPERATURE (°C) Figure 22. CMRR vs. Temperature at Different Gains, V REF 502µV MARKER 20 000.0Hz 5dB/DIV RANGE 12.5mV ...
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SOURCE 0.1 SINK 0.01 0.001 0.01 0.1 1 LOAD CURRENT (mA) Figure 28. Output Voltage to Supply Rail vs. Load Current 100 ILIMSINK 5V 50 ILIMSINK 2.7V 0 ILIMSRC 2.7V ILIMSRC 5V –50 –100 –50 – ...
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AD8557 140 120 100 0.01 0.1 0.1 1 FREQUENCY (kHz) Figure 34. PSRR vs. Frequency 3 CH3 50.0mV M 10.0µs T 24.20% Figure 35. Small Signal Response CH3 50.0mV M 10.0µs T ...
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CH1 50.0mV CH2 2.00V M 1.00µs A CH1 Figure 40. Positive Overload Recovery 1 V GAIN = + CH1 10.0mV CH2 2.00V M 10.0µs A CH1 Figure 41. Negative Overload Recovery V GAIN = +1300 T ...
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AD8557 THEORY OF OPERATION A1, A2, R1, R2, R3, P1, and P2 form the first gain stage of the differential amplifier. A1 and A2 are auto-zeroed op amps that minimize input offset errors. P1 and P2 are digital potentiome- ters, ...
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GAIN VALUES Table 6. First Stage Gain vs. First Stage Gain Code First Stage First Stage Gain Code Gain Code First Stage Gain 0 2.800 32 1 2.814 33 2 2.827 34 3 2.841 35 4 2.855 36 5 2.869 ...
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AD8557 OPEN WIRE FAULT DETECTION The inputs to A1 and A2, VNEG and VPOS, each have a com- parator to detect whether VNEG or VPOS exceeds a threshold voltage, nominally VDD − 2 VNEG > (VDD − 2.0 ...
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Table 10. Timing Specifications Timing Parameter Description t Pulse width for loading 0 into shift register w0 t Pulse width for loading 1 into shift register w1 t Width between pulses ws Table 11. 38-Bit Serial Word Format Field No. ...
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AD8557 Simulation Mode The simulation mode allows any parameter to be temporarily changed. These changes are retained until the simulated value is reprogrammed, the power is removed, or the master fuse is blown. Parameters are simulated by setting Field 1 ...
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If a parameter value is less than eight bits long, the MSBs of the shift register are padded with 0s. For example, to read the second stage gain, this code is used: 1000 0000 0001 0000 0000 ...
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AD8557 Determining Optimal Gain and Offset Codes First, determine the desired gain: 1. Determine the desired gain, G (using the measurements A obtained from the simulation). 2. Use Table 7 to determine G , the second stage gain, such 2 ...
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OUTLINE DIMENSIONS 0.25 (0.0098) 0.10 (0.0040) COPLANARITY PIN 1 INDICATOR 12° MAX 1.00 0.85 0.80 SEATING PLANE 5.00 (0.1968) 4.80 (0.1890 6.20 (0.2441) 4.00 (0.1574) 1 5.80 (0.2284) 3.80 (0.1497) 4 1.27 (0.0500) BSC 1.75 (0.0688) 1.35 (0.0532) ...
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... AD8557ACPZ-REEL7 −40°C to +125°C AD8557ARZ −40°C to +125°C AD8557ARZ-REEL −40°C to +125°C AD8557ARZ-REEL7 −40°C to +125° RoHS Compliant Part. AUTOMOTIVE PRODUCTS The AD8557 models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully ...
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NOTES Rev Page AD8557 ...
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AD8557 NOTES ©2007–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06013-0-7/10(B) Rev Page ...