MC68HC711E9VFN2 Freescale Semiconductor, MC68HC711E9VFN2 Datasheet - Page 114

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MC68HC711E9VFN2

Manufacturer Part Number
MC68HC711E9VFN2
Description
IC MCU 12K OTP 2MHZ 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E9VFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Resets and Interrupts
5.4 Effects of Reset
Technical Data
114
NOCOP — COP System Disable Bit
ROMON — ROM (EPROM) Enable Bit
EEON — EEPROM Enable Bit
When a reset condition is recognized, the internal registers and control
bits are forced to an initial state. Depending on the cause of the reset and
the operating mode, the reset vector can be fetched from any of six
possible locations. Refer to
These initial states then control on-chip peripheral systems to force them
to known startup states, as described in the following subsections.
Refer to
Refer to
Table 5-2. Reset Cause, Reset Vector, and Operating Mode
0 = COP enabled (forces reset on timeout)
1 = COP disabled (does not force reset on timeout)
COP Watchdog Timeout
Clock monitor failure
POR or RESET pin
Cause of Reset
Section 4. Operating Modes and On-Chip
Section 4. Operating Modes and On-Chip
Resets and Interrupts
Table
5-2.
Normal Mode
$FFFC, FFFD
$FFFE, FFFF
$FFFA, FFFB
Vector
M68HC11E Family — Rev. 3.2
$BFFC, $BFFD
$BFFE, $BFFF
$BFFA, $BFFB
or Bootstrap
Special Test
Memory.
Memory.
MOTOROLA

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