MC68HC11F1CFN2 Freescale Semiconductor, MC68HC11F1CFN2 Datasheet - Page 55

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MC68HC11F1CFN2

Manufacturer Part Number
MC68HC11F1CFN2
Description
IC MCU 512 EEPROM 2MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC11F1CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
30
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC11F1CFN2
Manufacturer:
MOT
Quantity:
90
Part Number:
MC68HC11F1CFN2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
ERASE — Erase/Normal Control for EEPROM
EELAT — EEPROM Latch Control
EEPGM — EEPROM Program Command
4.4.3 CONFIG Register Programming
CONFIG — System Configuration Register
TECHNICAL DATA
RESET:
Can be read or written any time.
Can be read or written any time. When EELAT equals one, writes to EEPROM cause
address and data to be latched.
Can be read any time. Can only be written while EELAT = 1.
Because the CONFIG register is implemented with EEPROM cells, use EEPROM pro-
cedures to erase and program this register. The procedure for programming is the
same as for programming a byte in the EEPROM array, except that the CONFIG reg-
ister address is used. CONFIG can be programmed or erased (including byte erase)
while the MCU is operating in any mode, provided that PTCON in BPROT is clear. To
change the value in the CONFIG register, complete the following procedure. Do not
initiate a reset until the procedure is complete. The new value will not take effect until
after the next reset sequence.
P indicates a previously programmed bit. P(L) indicates that the bit resets to the logic
level held in the EEPROM bit prior to reset, but the function of COP is controlled by
DISR bit in TEST1 register.
0 = Normal read or program mode
1 = Erase mode
0 = EEPROM address and data bus configured for normal reads
1 = EEPROM address and data bus configured for programming or erasing
0 = Program or erase voltage switched off to EEPROM array
1 = Program or erase voltage switched on to EEPROM array
1. Erase the CONFIG register.
2. Program the new value to the CONFIG address.
3. Initiate reset.
Bit 7
EE3
P
P
1
1
EE2
1
1
P
P
6
BYTE
Table 4-7 EEPROM Erase Mode Control
Freescale Semiconductor, Inc.
OPERATING MODES AND ON-CHIP MEMORY
0
0
1
1
For More Information On This Product,
EE1
P
P
5
1
1
Go to: www.freescale.com
ROW
0
1
0
1
EE0
P
P
4
1
1
Bulk Erase (All 512 Bytes)
Row Erase (16 Bytes)
Byte Erase
Byte Erase
3
1
1
1
1
Action
NOCOP
P(L)
P(L)
P
P
2
1
1
1
1
1
EEON
Bit 0
P
1
1
0
Single Chip
Bootstrap
Expanded
Special Test
$103F
4-17

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