PIC18F452-I/LG Microchip Technology, PIC18F452-I/LG Datasheet - Page 3

• Manufacturer Part Number: PIC18F452-I/LG
• Description: IC MCU FLASH 16KX16 W/AD 44PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F452-I/LG

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• For Use With: XLT44L2 - SOCKET TRAN ICE 44PLCCDVA16XL441 - ADAPTER DEVICE ICE 44PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5. Module: Core (Program Memory Space)
6. Module: Core (Program Memory Space)
© 2005 Microchip Technology Inc.
Note:
Performing table read operations above the user
program
1FFFFFh) may yield erroneous results at the
extreme low end of the device’s rated temperature
range (-40°C).
This applies specifically to addresses above
1FFFFFh,
(200000h-200007h),
(300000h-30000Dh) and the device ID locations
(3FFFFEh and 3FFFFFh). User program memory
is unaffected.
Work around
Three possible work arounds are presented. Other
solutions may exist.
1. Do not perform table read operations on areas
2. Insert NOP instructions (specifically, literal
Date Codes that pertain to this issue:
All engineering and production devices.
Under certain conditions, the execution of a table
read instruction may yield erroneous results. This
has been observed when a table read instruction
and its read destination, as indicated by the Table
Pointer registers, are on opposite sides of the
4000h program memory address boundary.
This behavior has not been observed when the
instruction and its target both occur strictly within
the same half of the program memory space.
Work around
Insert a data word of value FFFFh immediately
following any table read instruction. This behaves
as a NOP instruction when executed. Using the
actual NOP instruction instead of a literal FFFFh
may not have the same results.
This is a recommended solution. Others may exist.
Date Codes that pertain to this issue:
All engineering samples and devices with date
codes up to and including 0252 (Year 2002, Work
Week 52).
above the user memory space at -40°C.
FFFFh) around any table read instructions.
The suggested optimal number is 4 instruc-
tions before and 8 instructions after each table
read. This may vary depending upon the
particular application and should be optimized
by the user.
This issue applies only to PIC18F252
and PIC18F452 devices with 32K words of
Flash program memory. PIC18F242 and
PIC18F442 devices are not affected.
memory
including
space
the
the
configuration
user
(addresses
ID
locations
bytes
over
7. Module: Core (Program Memory Space)
Note:
Under certain conditions, the execution of some
control operations may yield unexpected results.
This has been observed when any of the following
instructions vector code execution across the
4000h program memory address boundary:
• CALL
• GOTO
• RETURN
• RETLW
• RETFIE
In addition, unexpected operation may result when
an interrupt causes the device to jump across the
4000h boundary to the appropriate interrupt
vector.
There are no known issues related to any of these
instructions when execution occurs strictly above
or below the 4000h address boundary.
Work around
Three possible solutions are presented. Others
may exist. It is recommended to implement any
one, or any combination of the three, as needed.
1. Insert a data word of value FFFFh as the first
2. Insert a data word of FFFFh at the interrupt
3. Insert a data word of value FFFFh immediately
In each of these instances, the literal data behaves
as a NOP instruction when executed. Using the
actual NOP instruction instead of a literal FFFFh
may not have the same results.
Date Codes that pertain to this issue:
All engineering samples and devices with date
codes up to and including 0252 (Year 2002, Work
Week 52).
instruction in the destination of a CALL or
GOTO.
vector address(es) (0008h and/or 0018h).
following any RETURN, RETLW, or RETFIE
instruction.
This issue applies only to PIC18F252
and PIC18F452 devices with 32K words of
Flash program memory. PIC18F242 and
PIC18F442 devices are not affected.
PIC18FXX2
DS80122K-page 3