AT90S8515-8AC Atmel, AT90S8515-8AC Datasheet - Page 2

• Manufacturer Part Number: AT90S8515-8AC
• Description: IC MCU 8K FLSH 8MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® 90Sr

Specifications of AT90S8515-8AC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

6.
5. The SPI Can Send Wrong Byte
4. Reset during EEPROM Write
3. SPI Interrupt Flag Can be Undefined after Reset
2. Serial Programming at Voltages below 3.0 Volts
2
Releasing Reset Condition without Clock
If an external reset or a watchdog reset occurs while the clock is stopped and the reset is released before the clock is
restarted, the internal reset will timeout after the start-up delay which is independent of the external clock. If no external
clock pulses are present in the period when internal reset is active, the reset does correctly cause tristating of the I/O
while the reset is held. However, if the internal reset is released before the clock starts running, the part does not clear
I/O registers, nor set PC to 0x00. Here, stopping the clock refers to gating the external clock input. Power-down mode
does not have this issue.
Problem Fix/Workaround
Make sure the clock is running whenever an external reset can be expected. If the Watchdog is used, never stop an
external clock.
If the SPI is in master mode, it will restart the old transfer if new data is written on the same clock edge as the previous
transfer is finished.
Problem Fix/Workaround
When writing to the SPI, first wait until it is ready; then write the byte to transmit.
If reset is activated during EEPROM write, the result is not what should be expected. The EEPROM write cycle com-
pletes as normal, but the address registers are reset to 0. The result is that both the address written and address 0 in
the EEPROM can be corrupted.
Problem Fix/Workaround
Avoid using address 0 for storage, unless you can guarantee that you will not get a reset during EEPROM write.
In certain cases when there are transitions on the SCK pin during reset, or the SCK pin is left unconnected, the start-up
value of the SPI interrupt flag is unknown. If the flag is not reset before enabling the SPI interrupt, a pending SPI inter-
rupt may be executed.
Problem Fix/Workaround
Clear the SPI interrupt flag before enabling the interrupt.
At voltages below 3.0 volts, serial programming might fail.
Problem Fix/Workaround
Keep V
AT90S8515 Errata
CC
at 3.0 volts or higher during In-System Programming.
2494A–09/01