SAK-TC1197-512F180E AC Infineon Technologies, SAK-TC1197-512F180E AC Datasheet - Page 152

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SAK-TC1197-512F180E AC

Manufacturer Part Number
SAK-TC1197-512F180E AC
Description
IC MCU 32BIT 4MB FLASH BGA416-10
Manufacturer
Infineon Technologies
Series
TC11xxr
Datasheet

Specifications of SAK-TC1197-512F180E AC

Core Processor
TriCore
Core Size
32-Bit
Speed
180MHz
Connectivity
ASC, CAN, EBI/EMI, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
219
Program Memory Size
4MB (4M x 8)
Program Memory Type
FLASH
Ram Size
224K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 48x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
416-BGA
Packages
PG-BGA-416
Max Clock Frequency
180.0 MHz
Sram (incl. Cache)
224.0 KByte
Can Nodes
4
A / D Input Lines (incl. Fadc)
48
Program Memory
4.0 MB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Data Sheet
all VDDP ), are internally directly connected. It is recommended that the power pins
of the same voltage are driven by a single power supply.
The PORST signal may be deactivated after all VDD5, VDD3.3, VDD1.5, and VAREF
power-supplies and the oscillator have reached stable operation, within the normal
operating conditions.
At normal power down the PORST signal should be activated within the normal
operating range, and then the power supplies may be switched off. Care must be
taken that all Flash write or delete sequences have been completed.
At power fail the PORST signal must be activated at latest when any 3.3 V or 1.5 V
power supply voltage falls 12% below the nominal level. The same limit of 3.3 V-12%
applies to the 5 V power supply too. If, under these conditions, the PORST is
activated during a Flash write, only the memory row that was the target of the write
at the moment of the power loss will contain unreliable content. In order to ensure
clean power-down behavior, the PORST signal should be activated as close as
possible to the normal operating voltage range.
In case of a power-loss at any power-supply, all power supplies must be powered-
down, conforming at the same time to the rules number 2 and 4.
Although not necessary, it is additionally recommended that all power supplies are
powered-up/down together in a controlled way, as tight to each other as possible.
Aditionally, regarding the ADC reference voltage VAREF:
– VAREF must power-up at the same time or later than VDDM, and
– VAREF must power-down eather earlier or at latest to satisfy the condition
VAREF < VDDM + 0.5 V. This is required in order to prevent discharge of VAREF
filter capacitance through the ESD diodes through the VDDM power supply. In
case of discharging the reference capacitance through the ESD diodes, the
current must be lower than 5 mA.
148
Electrical Parameters
V1.1, 2009-05
TC1197

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