C8051F062-GQR Silicon Laboratories Inc, C8051F062-GQR Datasheet - Page 301

• Manufacturer Part Number: C8051F062-GQR
• Description: IC 8051 MCU 64K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F06xr

Specifications of C8051F062-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 59
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 2x16b, 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: 336-1214 - DEV KIT FOR F060/F062/F063
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bits 7-0: RCAP2, 3, and 4L: Timer 2, 3, and 4 Capture Register Low Byte.
Bits 7-0: RCAP2, 3, and 4H: Timer 2, 3, and 4 Capture Register High Byte.
Bits 7-0: TL2, 3, and 4: Timer 2, 3, and 4 Low Byte.
SFR Address: RCAP2L: 0xCA; RCAP3L: 0xCA; RCAP4L: 0xCA
SFR Address: TMR2L: 0xCC; TMR3L: 0xCC; TMR4L: 0xCC
SFR Address: RCAP2H: 0xCB; RCAP3H: 0xCB; RCAP4H: 0xCB
SFR Page: RCAP2L: page 0; RCAP3L: page 1; RCAP4L: page 2
SFR Page: TMR2L: page 0; TMR3L: page 1; TMR4L: page 2
SFR Page: RCAP2H: page 0; RCAP3H: page 1; RCAP4H: page 2
R/W
R/W
Bit7
R/W
Bit7
Bit7
The RCAP2, 3, and 4L register captures the low byte of Timer 2, 3, and 4 when Timer 2, 3,
and 4 is configured in capture mode. When Timer 2, 3, and 4 is configured in auto-reload
mode, it holds the low byte of the reload value.
The RCAP2, 3, and 4H register captures the high byte of Timer 2, 3, and 4 when Timer 2, 3,
and 4 is configured in capture mode. When Timer 2, 3, and 4 is configured in auto-reload
mode, it holds the high byte of the reload value.
The TL2, 3, and 4 register contains the low byte of the 16-bit Timer 2, 3, and 4
Figure 24.16. RCAPnH: Timer 2, 3, and 4 Capture Register High Byte
Figure 24.15. RCAPnL: Timer 2, 3, and 4 Capture Register Low Byte
R/W
R/W
Bit6
R/W
Bit6
Bit6
Figure 24.17. TMRnL: Timer 2, 3, and 4 Low Byte
R/W
R/W
Bit5
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
R/W
Bit4
Rev. 1.2
R/W
R/W
Bit3
Bit3
R/W
Bit3
C8051F060/1/2/3/4/5/6/7
R/W
R/W
Bit2
Bit2
R/W
Bit2
R/W
R/W
Bit1
R/W
Bit1
Bit1
R/W
R/W
Bit0
R/W
Bit0
Bit0
Reset Value
Reset Value
00000000
Reset Value
00000000
00000000
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