MC9S08LL8CLF Freescale Semiconductor, MC9S08LL8CLF Datasheet - Page 32

• Manufacturer Part Number: MC9S08LL8CLF
• Description: IC MCU 8BIT 8K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08LL8CLF

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LCD, LVD, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 10KB (10K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: S08LL
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 31
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: TWR-SER, TWR-ELEV, TWR-S08LL64, TWR-SENSOR-PAK, TWR-S08LL64-KIT, TWR-LCD
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Controller Family/series: HCS08
• No. Of I/o's: 31
• Ram Memory Size: 2KB
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical Characteristics
3.10.3
Table 15
32
and
SPI Timing
No.
—
Figure 21
1
2
3
4
5
6
7
8
9
C
D
D
D
D
D
D
D
D
D
D
Operating frequency
SPSCK period
Enable lead time
Enable lag time
Clock (SPSCK) high or low time
Data setup time (inputs)
Data hold time (inputs)
Slave access time
Slave MISO disable time
Data valid (after SPSCK edge)
through
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
TPMCHn
TPMCHn
Figure 24
MC9S08LL16 Series MCU Data Sheet, Rev. 6
Figure 20. Timer Input Capture Pulse
Function
describe the timing requirements for the SPI system.
Table 15. SPI Timing
t
t
ICPW
ICPW
t
Symbol
WSPSCK
t
SPSCK
t
Lead
t
t
t
f
Lag
t
SU
t
dis
op
t
HI
a
v
f
t
t
Bus
cyc
cyc
Min
12
12
15
15
25
—
—
—
—
/2048
0
2
4
1
1
0
–30
– 30
1024 t
Freescale Semiconductor
f
f
2048
Max
Bus
Bus
25
25
—
—
—
—
—
—
—
—
—
—
1
1
/2
/4
cyc
t
t
SPSCK
SPSCK
Unit
t
t
t
t
t
t
Hz
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
cyc
cyc
cyc
cyc