STM32F103ZET6TR STMicroelectronics, STM32F103ZET6TR Datasheet - Page 125

MCU 32BIT ARM 512K FLASH 100-LQF

STM32F103ZET6TR

Manufacturer Part Number
STM32F103ZET6TR
Description
MCU 32BIT ARM 512K FLASH 100-LQF
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32F103ZET6TR

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
112
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 21x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
STM32F103x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
CAN, I2C, SPI, USART
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
112
Number Of Timers
11
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, KSDK-STM32-PLUS, KSK-STM32F103ZE, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 21 Channel
On-chip Dac
12 bit, 2 Channel
Cpu Family
STM32
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
72MHz
Total Internal Ram Size
64KB
# I/os (max)
112
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
For Use With
497-10030 - STARTER KIT FOR STM32497-8511 - KIT STARTER FOR STM32 512K FLASH497-6438 - BOARD EVALUTION FOR STM32 512K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Price
Part Number:
STM32F103ZET6TR
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STM32F103xC, STM32F103xD, STM32F103xE
Table 75.
21-Jul-2008
Date
Document revision history
Revision
3
Document status promoted from Preliminary Data to full datasheet.
FSMC (flexible static memory controller) on page 15
Number of complementary channels corrected in
STM32F103xC, STM32F103xD and STM32F103xE performance line
block
Power supply supervisor on page 17
Table 10: General operating conditions on page
Table notes revised in
Capacitance modified in
Table 52: SCL frequency (fPCLK1= 36 MHz.,VDD = 3.3 V)
Table 53: SPI characteristics
SPI timing diagram - slave mode and CPHA = 0 on page
Minimum SDA and SCL fall time value for Fast mode removed from
Table 51: I2C characteristics on page
I
to
Standby modes on page
Table 30: Flash memory endurance and data retention on page 63
updated.
t
EO corrected in
Typical connection diagram using the ADC on page 106
corrected.
Typical T
page
Section 6.1: Package mechanical data on page 111
Small text changes.
DD_VBAT
su(NSS)
Table 17: Typical and maximum current consumptions in Stop and
Doc ID 14611 Rev 8
110.
diagram.
modified in
S_temp
values and some I
value removed from
Table 62: ADC accuracy on page
Table 53: SPI characteristics on page
Section 5: Electrical
Figure 12: Power supply scheme on page
48.
DD
modified, t
values with regulator in run mode added
Changes
Table 64: TS characteristics on
modified and V
93, note 1 modified.
h(NSS)
characteristics.
modified in
42.
Figure 1:
105.
updated.
DDA
Revision history
modified.
Figure 58:
and note below
added to
96.
Figure 49:
95.
updated.
125/130
40.

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