ST72F325J6T6 STMicroelectronics, ST72F325J6T6 Datasheet - Page 52

• Manufacturer Part Number: ST72F325J6T6
• Description: MCU 8BIT 32KB FLASH/ROM 44-TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F325J6T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: ST7
• No. Of I/o's: 32
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 3
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1024 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 2
• Operating Supply Voltage: 3.8 V 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7232X-EVAL, ST7232X-SK/RAIS, ST72325-D/RAIS, ST7MDT20-DVP3, ST7MDT20J-EMU3, ST7MDT20M-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5603

ST72325xx
I/O PORTS (Cont’d)
Table 12. I/O Port Configurations
Notes:
1. When the I/O port is in input configuration and the associated alternate function is enabled as an output,
2. When the I/O port is in output configuration and the associated alternate function is enabled as an input,
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reading the DR register will read the alternate function output status.
the alternate function reads the pin status given by the DR register content.
NOT IMPLEMENTED IN
TRUE OPEN DRAIN
I/O PORTS
NOT IMPLEMENTED IN
TRUE OPEN DRAIN
I/O PORTS
NOT IMPLEMENTED IN
TRUE OPEN DRAIN
I/O PORTS
PAD
PAD
PAD
V
V
V
DD
R
DD
DD
R
R
PU
PU
PU
PULL-UP
CONDITION
Hardware Configuration
INTERRUPT
CONDITION
ALTERNATE
ALTERNATE
REGISTER
ENABLE
ENABLE
DR
DR REGISTER ACCESS
EXTERNAL INTERRUPT
SOURCE (ei
REGISTER
REGISTER
DR
DR
DR REGISTER ACCESS
DR REGISTER ACCESS
W
R
x
ALTERNATE
ALTERNATE
)
OUTPUT
OUTPUT
ALTERNATE INPUT
ANALOG INPUT
R/W
R/W
DATA BUS
DATA BUS
DATA BUS