AT91SAM9260B-CU Atmel, AT91SAM9260B-CU Datasheet - Page 15

IC ARM9 MCU 217-LFBGA

AT91SAM9260B-CU

Manufacturer Part Number
AT91SAM9260B-CU
Description
IC ARM9 MCU 217-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9260B-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Cpu Family
91S
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
180MHz
Interface Type
2-Wire/EBI/SPI/USART
Total Internal Ram Size
8KB
# I/os (max)
96
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
On-chip Adc
4-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
217
Package Type
LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
4 KB
Maximum Clock Frequency
210 MHz
Number Of Programmable I/os
96
Number Of Timers
5
Operating Supply Voltage
2 V to 4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9260-EK
Minimum Operating Temperature
- 40 C
Controller Family/series
AT91SAM9xxx
No. Of I/o's
96
Ram Memory Size
8KB
Cpu Speed
180MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
AT91SAM9260-EK - KIT EVAL FOR AT91SAM9260AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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6.4
6.5
6.6
6.7
7. Processor and Architecture
7.1
6221JS–ATARM–17-Jul-09
PIO Controllers
I/O Line Drive Levels
Shutdown Logic Pins
Slow Clock Selection
ARM926EJ-S Processor
All the I/O lines managed by the PIO Controllers integrate a programmable pull-up resistor.
Refer to the section on DC Characteristics in “AT91SAM9260 Electrical Characteristics” for
more information. Programming of this pull-up resistor is performed independently for each I/O
line through the PIO Controllers.
After reset, all the I/O lines default as inputs with pull-up resistors enabled, except those which
are multiplexed with the External Bus Interface signals and that must be enabled as Peripheral
at reset. This is explicitly indicated in the column “Reset State” of the PIO Controller multiplexing
tables.
The PIO lines are high-drive current capable. Each of these I/O lines can drive up to 16 mA per-
manently except PC4 to PC31 that are VDDIOM powered.
The SHDN pin is a tri-state output pin, which is driven by the Shutdown Controller. There is no
internal pull-up. An external pull-up tied to VDDBU is needed and its value must be higher than
1 MΩ. The resistor value is calculated according to the regulator enable implementation and the
SHDN level.
The pin WKUP is an input-only. It can accept voltages only between 0V and VDDBU.
The AT91SAM9260 slow clock can be generated either by an external 32,768 Hz crystal or the
on-chip RC oscillator.
Table 6-1
Table 6-1.
The startup counter delay for the slow clock oscillator depends on the OSCSEL signal. The
32,768 Hz startup delay is 1200 ms whereas it is 240 µs for the internal RC oscillator (refer to
Table
device.
OSCSEL
0
1
• RISC Processor Based on ARM v5TEJ Architecture with Jazelle technology for Java
• Two Instruction Sets
acceleration
– ARM High-performance 32-bit Instruction Set
– Thumb High Code Density 16-bit Instruction Set
6-1). The pin OSCSEL must be tied either to GND or VDDBU for correct operation of the
defines the states for OSCSEL signal.
Slow Clock Selection
Slow Clock
Internal RC
External 32768 Hz
Startup Time
240 µs
1200 ms
AT91SAM9260
15

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