ATMEGA1280-16AU Atmel, ATMEGA1280-16AU Datasheet - Page 8

• Manufacturer Part Number: ATMEGA1280-16AU
• Description: IC MCU AVR 128K FLASH 100-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA1280-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• A/d Inputs: 8-Channel, 10-Bit
• Cpu Speed: 16 MIPS
• Eeprom Memory: 4K Bytes
• Input Output: 86
• Interface: EBI/EMI/I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 100-pin TQFP
• Programmable Memory: 128K Bytes
• Timers: 2-8-bit, 4-16-bit
• Voltage, Range: 2.7-5.5 V
• Controller Family/series: AVR MEGA
• No. Of I/o's: 86
• Eeprom Memory Size: 4KB
• Ram Memory Size: 8KB
• No. Of Timers: 6
• Rohs Compliant: Yes
• Package: 100TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 86
• Interface Type: JTAG/TWI/SPI/USART
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 6
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Ram Size: 8 KB
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRRZ541, ATAVRRAVEN, ATAVRRZRAVEN, ATAVRRZUSBSTICK, ATAVRISP2, ATAVRRZ201
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.3.6
2.3.7
2.3.8
2.3.9
2.3.10
2549MS–AVR–09/10
Port D (PD7..PD0)
Port E (PE7..PE0)
Port F (PF7..PF0)
Port G (PG5..PG0)
Port H (PH7..PH0)
resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port C also serves the functions of special features of the ATmega640/1280/1281/2560/2561 as
listed on
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port D output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
P o r t D a l s o s e r v e s t h e f u n c t i o n s o f v a r i o u s s p e c i a l f e a t u r e s o f t h e
ATmega640/1280/1281/2560/2561 as listed on
Port E is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port E output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port E pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port E pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
P o r t E a l s o s e r v e s t h e f u n c t i o n s o f v a r i o u s s p e c i a l f e a t u r e s o f t h e
ATmega640/1280/1281/2560/2561 as listed on
Port F serves as analog inputs to the A/D Converter.
Port F also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins
can provide internal pull-up resistors (selected for each bit). The Port F output buffers have sym-
metrical drive characteristics with both high sink and source capability. As inputs, Port F pins
that are externally pulled low will source current if the pull-up resistors are activated. The Port F
pins are tri-stated when a reset condition becomes active, even if the clock is not running. If the
JTAG interface is enabled, the pull-up resistors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will
be activated even if a reset occurs.
Port F also serves the functions of the JTAG interface.
Port G is a 6-bit I/O port with internal pull-up resistors (selected for each bit). The Port G output
buffers have symmetrical drive characteristics with both high sink and source capability. As
inputs, Port G pins that are externally pulled low will source current if the pull-up resistors are
activated. The Port G pins are tri-stated when a reset condition becomes active, even if the clock
is not running.
P o r t G a l s o s e r v e s t h e f u n c t i o n s o f v a r i o u s s p e c i a l f e a t u r e s o f t h e
ATmega640/1280/1281/2560/2561 as listed on
Port H is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port H output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port H pins that are externally pulled low will source current if the pull-up
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82.
ATmega640/1280/1281/2560/2561
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83.
86.
90.
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