PIC32MX575F512L-80I/PF Microchip Technology, PIC32MX575F512L-80I/PF Datasheet - Page 28

• Manufacturer Part Number: PIC32MX575F512L-80I/PF
• Description: IC MCU 32BIT 512KB FLASH 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX575F512L-80I/PF

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: MIPS32® M4K™
• Speed: 80MHz
• Connectivity: CAN, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Controller Family/series: PIC32
• Ram Memory Size: 64KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Interface: CAN, I2C, SPI, UART, USB
• No. Of Pwm Channels: 5
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: PIC32MX5xx
• Core: MIPS
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC32MX
FIGURE 16-1:
The command in the Opcode field must match one of
the commands in the command set that is listed in
Table 16-3. Any command received that does not
match a command the list returns a NACK response,
as shown in Table 16-2.
The PE uses the command Length field to determine
the number of bytes to read from or to write to. If the
value of this field is incorrect, the command is not be
properly received by the PE.
16.2.2
The PE response set is shown in Table 16-2. All PE
responses have a general format consisting of a 32-bit
header and any required data for the response (see
Figure 16-2).
FIGURE 16-2:
TABLE 16-3:
DS61145G-page 28
31
15
31
15
31
15
31
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
Opcode
Note 1: Length does not indicate the length of data to be transferred. Length indicates the size of the command
2: One row of code memory consists of (128) 32-bit words. Refer to Table 16-1 for device-specific
Command Data High (if required)
Command Data Low (if required)
ROW_PROGRAM
READ
PROGRAM
WORD_PROGRAM
CHIP_ERASE
PAGE_ERASE
BLANK_CHECK
EXEC_VERSION
GET_CRC
RESPONSE FORMAT
itself, including 32-bit header.
information.
Mnemonic
PE COMMAND SET
Length (optional)
Response Code
Last Command
Data_High_1
COMMAND FORMAT
RESPONSE FORMAT
Opcode
(32-bit words)
Length
130
2
2
3
1
2
1
1
2
(1)
16
16
Program one row of Flash memory at the specified address
Read N 32-bit words of memory starting from the specified
address. (N < 65536).
Program Flash memory starting at the specified address.
Program one word of Flash memory at the specified address.
Chip Erase of entire chip.
Erase pages of code memory from the specified address.
Blank Check code.
Read the PE software version.
Get the CRC of Flash memory.
16
16
0
0
0
FIGURE 16-2:
16.2.2.1
Last_Cmd is a 16-bit field in the first word of the
response and indicates the command that the PE pro-
cessed. It can be used to verify that the PE correctly
received
transmitted.
16.2.2.2
The response code indicates whether the last
command succeeded or failed, or if the command is a
value that is not recognized. The response code values
are shown in Table 16-2.
TABLE 16-2:
16.2.2.3
The response header may be followed by optional data
in case of certain commands such as read. The num-
ber of 32-bit words of optional data varies depending
on the last command operation and its parameters.
15
31
15
0x0
0x2
0x3
Opcode
the
PASS
FAIL
NACK
Mnemonic
Last_Cmd Field
Response Code
Optional Data
Description
command
RESPONSE VALUES
Data_High_N
Data_Low_N
Data_Low_1
RESPONSE FORMAT
© 2010 Microchip Technology Inc.
Command successfully
processed
Command unsuccessfully
processed
Command not known
that
Description
the
programmer
(2)
.
16
0
0