PIC18F4455-I/P Microchip Technology, PIC18F4455-I/P Datasheet - Page 180

IC PIC MCU FLASH 12KX16 40DIP

PIC18F4455-I/P

Manufacturer Part Number
PIC18F4455-I/P
Description
IC PIC MCU FLASH 12KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4455-I/P

Program Memory Type
FLASH
Program Memory Size
24KB (12K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI/I2C/EAUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRDDVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4455-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC18F4455-I/PT
Manufacturer:
Microchip Technology
Quantity:
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PIC18F4455-I/PT
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PIC18F2455/2550/4455/4550
17.5.1
The USB Interrupt Status register (Register 17-7) con-
tains the flag bits for each of the USB status interrupt
sources. Each of these sources has a corresponding
interrupt enable bit in the UIE register. All of the USB
status flags are ORed together to generate the USBIF
interrupt flag for the microcontroller’s interrupt funnel.
REGISTER 17-7:
DS39632C-page 178
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
2:
3:
4:
Once an Idle state is detected, the user may want to place the USB module in Suspend mode.
Clearing this bit will cause the USTAT FIFO to advance (valid only for IN, OUT and SETUP tokens).
This bit is typically unmasked only following the detection of a UIDLE interrupt event.
Only error conditions enabled through the UEIE register will set this bit. This bit is a status bit only and
cannot be set or cleared by the user.
USB INTERRUPT STATUS
REGISTER (UIR)
Unimplemented: Read as ‘0’
SOFIF: START-OF-FRAME Token Interrupt bit
1 = A START-OF-FRAME token received by the SIE
0 = No START-OF-FRAME token received by the SIE
STALLIF: A STALL Handshake Interrupt bit
1 = A STALL handshake was sent by the SIE
0 = A STALL handshake has not been sent
IDLEIF: Idle Detect Interrupt bit
1 = Idle condition detected (constant Idle state of 3 ms or more)
0 = No Idle condition detected
TRNIF: Transaction Complete Interrupt bit
1 = Processing of pending transaction is complete; read USTAT register for endpoint information
0 = Processing of pending transaction is not complete or no transaction is pending
ACTVIF: Bus Activity Detect Interrupt bit
1 = Activity on the D+/D- lines was detected
0 = No activity detected on the D+/D- lines
UERRIF: USB Error Condition Interrupt bit
1 = An unmasked error condition has occurred
0 = No unmasked error condition has occurred.
URSTIF: USB Reset Interrupt bit
1 = Valid USB Reset occurred; 00h is loaded into UADDR register
0 = No USB Reset has occurred
SOFIF
R/W-0
UIR: USB INTERRUPT STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
STALLIF
R/W-0
IDLEIF
(1)
R/W-0
Preliminary
(1)
(3)
(2)
(4)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TRNIF
R/W-0
Once an interrupt bit has been set by the SIE, it must
be cleared by software by writing a ‘0’. The flag bits
can also be set in software which can aid in firmware
debugging.
(2)
ACTVIF
R/W-0
(3)
© 2006 Microchip Technology Inc.
x = Bit is unknown
UERRIF
R-0
(4)
URSTIF
R/W-0
bit 0

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