PIC18F2525-E/SP Microchip Technology, PIC18F2525-E/SP Datasheet - Page 105
![IC MCU FLASH 24KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F2525-E/SP
Manufacturer Part Number
PIC18F2525-E/SP
Description
IC MCU FLASH 24KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2525-ISO.pdf
(412 pages)
3.PIC18F2525-ISO.pdf
(18 pages)
4.PIC18F2525-ISO.pdf
(18 pages)
5.PIC18F2525-ISO.pdf
(6 pages)
6.PIC18F2525-ISO.pdf
(6 pages)
Specifications of PIC18F2525-E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3986 B
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
I3DB18F4620 - BOARD DAUGHTER ICEPIC3DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F2525-E/SP
Manufacturer:
Microchip Technology
Quantity:
135
- PIC18F2221-ISO PDF datasheet
- PIC18F2525-ISO PDF datasheet #2
- PIC18F2525-ISO PDF datasheet #3
- PIC18F2525-ISO PDF datasheet #4
- PIC18F2525-ISO PDF datasheet #5
- PIC18F2525-ISO PDF datasheet #6
- Current page: 105 of 412
- Download datasheet (7Mb)
9.5
Depending on the particular PIC18F2525/2620/4525/
4620 device selected, PORTE is implemented in two
different ways.
For 40/44-pin devices, PORTE is a 4-bit wide port.
Three pins (RE0/RD/AN5, RE1/WR/AN6 and RE2/CS/
AN7) are individually configurable as inputs or outputs.
These pins have Schmitt Trigger input buffers. When
selected as an analog input, these pins will read as ‘0’s.
The corresponding Data Direction register is TRISE.
Setting a TRISE bit (= 1) will make the corresponding
PORTE pin an input (i.e., put the corresponding output
driver in a high-impedance mode). Clearing a TRISE bit
(= 0) will make the corresponding PORTE pin an output
(i.e., put the contents of the output latch on the selected
pin).
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
The upper four bits of the TRISE register also control
the operation of the Parallel Slave Port. Their operation
is explained in Register 9-1.
The Data Latch register (LATE) is also memory
mapped. Read-modify-write operations on the LATE
register, read and write the latched output value for
PORTE.
© 2008 Microchip Technology Inc.
Note:
PORTE, TRISE and LATE
Registers
On a Power-on Reset, RE2:RE0 are
configured as analog inputs.
PIC18F2525/2620/4525/4620
The fourth pin of PORTE (MCLR/V
only pin. Its operation is controlled by the MCLRE Con-
figuration bit. When selected as a port pin (MCLRE = 0),
it functions as a digital input only pin; as such, it does not
have TRIS or LAT bits associated with its operation.
Otherwise, it functions as the device’s Master Clear
input. In either configuration, RE3 also functions as the
programming voltage input during programming.
EXAMPLE 9-5:
9.5.1
For 28-pin devices, PORTE is only available when
Master Clear functionality is disabled (MCLRE = 0). In
these cases, PORTE is a single bit, input only port
comprised of RE3 only. The pin operates as previously
described.
CLRF
CLRF
MOVLW
MOVWF
MOVLW
MOVWF
Note:
PORTE
LATE
0Ah
ADCON1 ; for digital inputs
03h
TRISE
On a Power-on Reset, RE3 is enabled as
a digital input only if Master Clear
functionality is disabled.
PORTE IN 28-PIN DEVICES
; Initialize PORTE by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Configure A/D
; Value used to
; initialize data
; direction
; Set RE<0> as inputs
; RE<1> as outputs
; RE<2> as inputs
INITIALIZING PORTE
PP
DS39626E-page 103
/RE3) is an input
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