PIC18F65J10-I/PT Microchip Technology, PIC18F65J10-I/PT Datasheet - Page 368

• Manufacturer Part Number: PIC18F65J10-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J10-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J10 FAMILY
FIGURE 27-5:
TABLE 27-9:
DS39663F-page 366
10
11
12
13
14
15
16
17
18
18A
19
20
20A
21
21A
22†
23†
Legend: TBD = To Be Determined
Note 1:
Param
No.
Note:
(Output)
I/O pin
I/O pin
(Input)
OSC1
CLKO
† These parameters are asynchronous events not related to any internal clock edges.
T
T
T
T
T
T
T
T
T
T
T
T
T
T
OS
OS
CK
CK
CK
CK
OS
OS
Symbol
IO
IO
IO
IO
INP
RBP
Measurements are taken in RC mode, where CLKO output is 4 x T
V2
V2
R
F
H2
R
F
L2
H2
H2
H2
H2
Refer to Figure 27-3 for load conditions.
CK
OS
IO
CK
IO
CK
IO
IO
V CLKO ↓ to Port Out Valid
H Port In Valid before CLKO ↑
I
V OSC1 ↑ (Q1 cycle) to Port Out Valid
I
H Port Input Valid to OSC1 ↑
H OSC1 ↑ to CLKO ↑
L OSC1 ↑ to CLKO ↓
CLKO AND I/O TIMING REQUIREMENTS
CLKO Rise Time
CLKO Fall Time
Port In Hold after CLKO ↑
OSC1 ↑ (Q2 cycle) to Port Input Invalid
(I/O in hold time)
(I/O in setup time)
Port Output Rise Time
Port Output Fall Time
INTx Pin High or Low Time
RB<7:4> Change INTx High or Low Time
CLKO AND I/O TIMING
Old Value
Q4
Characteristic
10
13
17
14
20, 21
Q1
19
0.25 T
18
Min
100
200
T
T
—
—
—
—
—
—
—
—
—
—
CY
CY
CY
0
0
+ 25
Q2
15
New Value
OSC
Typ
75
75
15
15
50
—
—
—
—
—
—
—
—
—
—
—
—
.
0.5 T
© 2009 Microchip Technology Inc.
Max
200
200
150
CY
30
30
—
—
—
—
—
—
—
—
—
6
5
11
12
+ 20
16
Units Conditions
Q3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
—
ns
—
ns
ns
(Note 1)
(Note 1)
(Note 1)
(Note 1)
V
DD
= 2.0V