PIC18F45K20-I/ML Microchip Technology, PIC18F45K20-I/ML Datasheet - Page 354

IC PIC MCU FLASH 16KX16 44QFN

PIC18F45K20-I/ML

Manufacturer Part Number
PIC18F45K20-I/ML
Description
IC PIC MCU FLASH 16KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F45K20-I/ML

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Package
44QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC18F2XK20/4XK20
TBLWT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
DS41303G-page 354
Table Write
TBLWT ( *; *+; *-; +*)
None
if TBLWT*,
(TABLAT)  Holding Register;
TBLPTR – No Change;
if TBLWT*+,
(TABLAT)  Holding Register;
(TBLPTR) + 1  TBLPTR;
if TBLWT*-,
(TABLAT)  Holding Register;
(TBLPTR) – 1  TBLPTR;
if TBLWT+*,
(TBLPTR) + 1  TBLPTR;
(TABLAT)  Holding Register;
None
This instruction uses the 3 LSBs of
TBLPTR to determine which of the
8 holding registers the TABLAT is written
to. The holding registers are used to
program the contents of Program
Memory (P.M.). (Refer to Section 6.0
“Flash Program Memory” for additional
details on programming Flash memory.)
The TBLPTR (a 21-bit pointer) points to
each byte in the program memory.
TBLPTR has a 2-MByte address range.
The LSb of the TBLPTR selects which
byte of the program memory location to
access.
The TBLWT instruction can modify the
value of TBLPTR as follows:
• no change
• post-increment
• post-decrement
• pre-increment
1
2
operation
Decode
0000
Q1
No
TBLPTR[0] = 0: Least Significant
TBLPTR[0] = 1: Most Significant
operation
operation
TABLAT)
(Read
0000
Q2
No
No
operation
operation
0000
Byte of Program
Memory Word
Byte of Program
Memory Word
Q3
No
No
nn=0 *
Register )
operation
operation
(Write to
Holding
=1 *+
=2 *-
=3 +*
11nn
Q4
No
No
TBLWT
Example1:
Example 2:
Before Instruction
After Instructions (table write completion)
Before Instruction
After Instruction (table write completion)
TABLAT
TBLPTR
HOLDING REGISTER
TABLAT
TBLPTR
HOLDING REGISTER
TABLAT
TBLPTR
HOLDING REGISTER
HOLDING REGISTER
TABLAT
TBLPTR
HOLDING REGISTER
HOLDING REGISTER
(00A356h)
(00A356h)
(01389Ah)
(01389Bh)
(01389Ah)
(01389Bh)
Table Write (Continued)
TBLWT *+;
TBLWT +*;
 2010 Microchip Technology Inc.
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55h
00A356h
FFh
55h
00A357h
55h
34h
01389Ah
FFh
FFh
34h
01389Bh
FFh
34h

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