PIC18F45K20-I/ML Microchip Technology, PIC18F45K20-I/ML Datasheet - Page 7

IC PIC MCU FLASH 16KX16 44QFN

PIC18F45K20-I/ML

Manufacturer Part Number
PIC18F45K20-I/ML
Description
IC PIC MCU FLASH 16KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F45K20-I/ML

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Package
44QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
19. Module: POR
20. Module: POR
21. Module: Clocks
 2010 Microchip Technology Inc.
The POR may release around 0.8V (below the
POR rearm voltage of 1.2V, nominal) when V
rises from below 0.60V (when BOR is not enabled)
or 0.33V (when BOR is enabled).
Work around
Use Power-up Timer when operating with the EC,
EXTRC or HFINTOSC oscillator modes. Ensure
that V
time.
Affected Silicon Revisions
The part may hang in the Reset state when V
rises to the operating range at a rate faster than
7500V per second. Recovery from the hung state
is possible only by first lowering V
followed by raising V
Work around
Slow V
between the voltage supply and the V
increasing the V
bypassing should remain on the pin side of the
series resistor.
Affected Silicon Revisions
EC mode operation is limited to a maximum of
48 MHz (Rev. A4 and A7 only).
Work around
Divide external clock by 4 and use HS-PLL Clock
mode for external clocking above 48 MHz.
Affected Silicon Revisions
X
X
X
DD
DD
X
X
X
rise time is less than the Power-up Timer
rise time by adding series resistance
X
X
DD
DD
X
X
bypass capacitance. V
to the operating range.
PIC18F24K20/25K20/44K20/45K20
DD
to below 0.3V,
DD
pin and
DD
DD
DD
22. Module: Comparators
23. Module: Data EEPROM Memory
24. Module: Program Flash Memory
When the CxON bit is clear, the output from the
comparator will be properly forced to zero, but the
CxPOL bit will improperly have no effect on the
CxOUT bit. This prevents presetting the compara-
tor change-on-interrupt mismatch latches as
described in the data sheet.
Work around
Configure one of the unused comparator input
channels as a digital output. Use that digital output
to manipulate the comparator output to the desired
CxOUT non-interrupt level. When the comparator
is then set to the desired inputs, the mismatch
latches will be preset to the non-interrupt level and
the CxIF flag can then be cleared.
Affected Silicon Revisions
The write/erase endurance of Data EE Memory is
limited to 10K cycles.
Work around
Use error correction method that stores data in
multiple locations.
Affected Silicon Revisions
The write/erase endurance of the PFM is limited to
1K cycles when V
degrades when V
Work around
For data tables in program Flash memory use
error correction method that stores data in multiple
locations.
Affected Silicon Revisions
X
X
X
X
X
X
X
X
X
DD
DD
is below 3V.
X
X
X
is above 3V. Endurance
X
X
DS80425G-page 7
X
X
X
X

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