PIC18LF14K22-I/ML Microchip Technology, PIC18LF14K22-I/ML Datasheet - Page 21

• Manufacturer Part Number: PIC18LF14K22-I/ML
• Description: IC PIC MCU FLASH 512KX16 20-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF14K22-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, MSSP, SPI, USART
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 18
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

4.5
The code sequence detailed in Table 4-5 should be
used, except that the address used in “Step 2” will be in
the following ranges:
If BBSIZ = 0:
If BBSIZ = 1:
TABLE 4-9:
FIGURE 4-8:
© 2009 Microchip Technology Inc.
Step 1: Direct access to configuration memory.
0000
0000
0000
Step 2
0000
0000
0000
0000
0000
0000
1111
0000
0000
0000
1111
0000
Note 1:
000000h-0003FFh for PIC18F13K22/LF13K22
000000h-0007FFh for PIC18F14K22/LF14K22
000000h-0007FFh for PIC18F13K22/LF13K22
000000h-000FFFh for PIC18F14K22/LF14K22
Command
4-bit
(1)
Boot Block Programming
: Set Table Pointer for configuration byte to be written. Write even/odd addresses.
Enabling the write protection of Configuration bits (WRTC = 0 in CONFIG6H) will prevent further writing of Configura-
tion bits. Always write all the Configuration bits before enabling the write protection for Configuration bits.
<MSB ignored><LSB>
<MSB><LSB ignored>
SET ADDRESS POINTER TO CONFIGURATION LOCATION
Data Payload
CONFIGURATION PROGRAMMING FLOW
Delay P9 and P10
Time for Write
8E A6
8C A6
6E F8
6E F7
6E F6
6E F6
Configuration
84 A6
0E 30
0E 00
0E 00
0E 01
00 00
00 00
Load Even
Program
Address
Done
Start
LSB
BSF EECON1, EEPGD
BSF EECON1, CFGS
BSF EECON1, WREN
MOVLW 30h
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPRTH
MOVLW 00h
MOVWF TBLPTRL
Load 2 bytes and start programming.
NOP - hold PGC high for time P9 and low for time P10.
MOVLW 01h
MOVWF TBLPTRL
Load 2 bytes and start programming.
NOP - hold PGC high for time P9A and low for time P10.
Advance Information
PIC18F1XK22/LF1XK22
4.6
Unlike program Flash, the Configuration bits are
programmed a byte at a time. The Table Write, Begin
Programming 4-bit command (‘1111’) is used, but only
8 bits of the following 16-bit payload will be written. The
LSB of the payload will be written to even addresses
and the MSB will be written to odd addresses. The
code
configuration locations is shown in Table 4-9. See
Figure 4-5 for the timing diagram.
Note:
Core Instruction
sequence
Configuration Bits Programming
Delay P9 and P10
The address must be explicitly written for
each byte programmed. The addresses
can not be incremented in this mode.
Time for Write
Configuration
Load Odd
Program
Address
Start
MSB
Done
to
program
two
DS41357B-page 21
consecutive