PIC18F25K20-I/ML Microchip Technology, PIC18F25K20-I/ML Datasheet - Page 15
![IC PIC MCU FLASH 16KX16 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18F25K20-I/ML
Manufacturer Part Number
PIC18F25K20-I/ML
Description
IC PIC MCU FLASH 16KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(12 pages)
3.PIC18F25K20T-ISS.pdf
(14 pages)
4.PIC18F25K20T-ISS.pdf
(456 pages)
5.PIC18F26K20-EML.pdf
(430 pages)
Specifications of PIC18F25K20-I/ML
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
64MHz
No. Of Timers
4
Package
28QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
25
Interface Type
I2C/SPI/USART
On-chip Adc
11-chx10-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F25K20-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
TABLE 3-3:
© 2009 Microchip Technology Inc.
Step 1: Direct access to code memory and enable writes.
Step 2: Point to first row in code memory.
Step 3: Enable erase and erase single row.
Step 4: Poll WR bit. Repeat until bit is clear.
Step 5: Hold PGC low for time P10.
Step 6: Repeat step 3 with Address Pointer incremented by 64 until all rows are erased.
Step 7: Disable writes.
Note 1:
Command
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0010
0000
4-bit
See Figure 4-4 for details on shift out data timing.
ERASE CODE MEMORY CODE SEQUENCE
<MSB><LSB>
Data Payload
9C A6
8E A6
6A F8
6A F7
6A F6
6E F5
84 A6
88 A6
82 A6
00 00
00 00
50 A6
00 00
94 A6
BSF
BCF
BSF
CLRF
CLRF
CLRF
BSF
BSF
NOP
NOP
MOVF EECON1, W, 0
MOVWF TABLAT
NOP
Shift out data
BCF EECON1, WREN
Advance Information
EECON1, EEPGD
EECON1, CFGS
EECON1, WREN
TBLPTRU
TBLPTRH
TBLPTRL
EECON1, FREE
EECON1, WR
Erase starts on the 4th clock of this instruction
(1)
PIC18F2XK20/4XK20
Core Instruction
DS41297F-page 15