PIC18F14K22-E/P Microchip Technology, PIC18F14K22-E/P Datasheet - Page 110
PIC18F14K22-E/P
Manufacturer Part Number
PIC18F14K22-E/P
Description
IC MCU 8BIT 16KB FLASH 20DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC18LF13K22-ISS.pdf
(388 pages)
3.PIC18F14K22-EP.pdf
(4 pages)
Specifications of PIC18F14K22-E/P
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
20-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
18
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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PIC18F1XK22/LF1XK22
12.1
Timer3 can operate in one of three modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
The operating mode is determined by the clock select
bit, TMR3CS of the T3CON register. When TMR3CS is
cleared (= 0), Timer3 increments on every internal
instruction cycle (F
increments on every rising edge of the Timer1 external
clock input or the Timer1 oscillator, if enabled.
As with Timer1, the digital circuitry associated with the
OSC1 and OSC2 pins is disabled when the Timer1
oscillator is enabled. This means the values of
TRISA<5:4> are ignored and the pins are read as ‘0’.
FIGURE 12-1:
DS41365D-page 110
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
OSC1/T13CKI
Timer3 Operation
Without CLKOUT
OSC2
T1OSCEN
INTOSC
OSC
(1)
CCP1 Select from T3CON<3>
CCP1 Special Event Trigger
Timer1 Oscillator
T3CKPS<1:0>
T3SYNC
TMR3ON
TIMER3 BLOCK DIAGRAM
/4). When the bit is set, Timer3
TMR3CS
Clock
Internal
F
OSC
/4
Preliminary
1
0
Timer1 Clock Input
Clear TMR3
Prescaler
1, 2, 4, 8
2
TMR3L
Sleep Input
Synchronize
Detect
High Byte
TMR3
2010 Microchip Technology Inc.
1
0
on Overflow
TMR3IF
Set
Timer3
On/Off
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