C8051F501-IQ Silicon Laboratories Inc, C8051F501-IQ Datasheet - Page 70

IC 8051 MCU 64K FLASH 48-QFP

C8051F501-IQ

Manufacturer Part Number
C8051F501-IQ
Description
IC 8051 MCU 64K FLASH 48-QFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F50xr
Datasheets

Specifications of C8051F501-IQ

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
48-QFP
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
40
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 32x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
40
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
32-ch x 12-bit
Package
48PQFP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1527 - KIT DEV FOR C8051F50X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1512

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F501-IQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F501-IQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F50x/F51x
6.5. ADC0 Analog Multiplexer
ADC0 includes an analog multiplexer to enable multiple analog input sources. Any of the following may be
selected as an input: P0.0 – P3.7, the on-chip temperature sensor, the core power supply (V
(GND). ADC0 is single-ended and all signals measured are with respect to GND. The ADC0 input
channels are selected using the ADC0MX register as described in SFR Definition 6.13.
Important Note About ADC0 Input Configuration: Port pins selected as ADC0 inputs should be config-
ured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for analog
input, set to 0 the corresponding bit in register PnMDIN. To force the Crossbar to skip a Port pin, set to 1
the corresponding bit in register PnSKIP. See Section “20. Port Input/Output” on page 177 for more Port
I/O configuration details.
70
Sensor
Temp
Figure 6.8. ADC0 Multiplexer Block Diagram
P0.0
P0.7
P1.0
P1.7
P2.0
P2.7
P3.0
P3.7
GND
VDD
AMUX
Rev. 1.2
*P3.1-P3.7 Only available as
inputs on 48-pin and 40-pin
ADC0MX
ADC0
packages
DD
), or ground

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