P89LPC932A1FDH,512 NXP Semiconductors, P89LPC932A1FDH,512 Datasheet - Page 38

IC 80C51 MCU FLASH 8K 28-TSSOP

P89LPC932A1FDH,512

Manufacturer Part Number
P89LPC932A1FDH,512
Description
IC 80C51 MCU FLASH 8K 28-TSSOP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet

Specifications of P89LPC932A1FDH,512

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
28-TSSOP
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
26
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89LPC9x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
26
Number Of Timers
2
Operating Supply Voltage
2.4 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Cpu Family
89LP
Device Core
80C51
Device Core Size
8b
Frequency (max)
18MHz
Total Internal Ram Size
768Byte
# I/os (max)
26
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.4V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Package Type
TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
OM6292 - DEMO BOARD PCA2125 RTCDB-TSSOP-LPC932 - BOARD FOR LPC932 TSSOP622-1014 - BOARD FOR LPC9XX TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART622-1003 - KIT FOR LCD DEMO622-1002 - USB IN-CIRCUIT PROG LPC9XX568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4515-5
935276132512
P89LPC932A1FDH
P89LPC932A1FDH
NXP Semiconductors
P89LPC932A1_3
Product data sheet
Fig 20. Comparator input and output connections
(P0.5) CMPREF
7.23.1 Internal reference voltage
7.23.2 Comparator interrupt
(P0.4) CIN1A
(P0.3) CIN1B
(P0.2) CIN2A
(P0.1) CIN2B
7.23 Analog comparators
V
ref(bg)
Two analog comparators are provided on the P89LPC932A1. Input and output options
allow use of the comparators in a number of different configurations. Comparator
operation is such that the output is a logic 1 (which may be read in a register and/or routed
to a pin) when the positive input (one of two selectable pins) is greater than the negative
input (selectable from a pin or an internal reference voltage). Otherwise the output is a
zero. Each comparator may be configured to cause an interrupt when the output value
changes.
The overall connections to both comparators are shown in
function to V
When each comparator is first enabled, the comparator output and interrupt flag are not
guaranteed to be stable for 10 microseconds. The corresponding comparator interrupt
should not be enabled during that time, and the comparator interrupt flag must be cleared
before the interrupt is enabled in order to prevent an immediate interrupt service.
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to as
V
Each comparator has an interrupt flag contained in its configuration register. This flag is
set whenever the comparator output changes state. The flag may be polled by software or
may be used to generate an interrupt. The two comparators use one common interrupt
vector. If both comparators enable interrupts, after entering the interrupt service routine,
the user needs to read the flags to determine which comparator caused the interrupt.
REF
, is 1.23 V
DD
CP1
CN1
CP2
CN2
= 2.4 V.
10 %.
comparator 1
comparator 2
Rev. 03 — 12 March 2007
8-bit microcontroller with accelerated two-clock 80C51 core
CO1
CO2
change detect
change detect
OE1
OE2
CMF1
CMF2
CMP1 (P0.6)
CMP2 (P0.0)
Figure
P89LPC932A1
002aaa904
EC
20. The comparators
© NXP B.V. 2007. All rights reserved.
interrupt
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