DSPIC30F6012A-30I/PF Microchip Technology, DSPIC30F6012A-30I/PF Datasheet - Page 163

• Manufacturer Part Number: DSPIC30F6012A-30I/PF
• Description: IC DSPIC MCU/DSP 144K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6012A-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 52
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 64TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 52
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 20-7:
TABLE 20-8:
RCON
OSCCON
OSCTUN
PMD1
PMD2
Legend:
Note
FOSC
FWDT
FBORPOR
FBS
FSS
FGS
FICD
Legend:
Note
Name
File Name
SFR
1:
1:
Addr.
0740 TRAPR IOPUWR BGST LVDEN
0742
0744
0770
0772
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
— = unimplemented bit, read as ‘0’
— = unimplemented bit, read as ‘0’
F8000C
F80000
F80002
F80004
F80006
F80008
F8000A
Addr.
IC8MD
Bit 15
T5MD
—
—
SYSTEM INTEGRATION REGISTER MAP FOR dsPIC30F601XA
DEVICE CONFIGURATION REGISTER MAP
IC7MD
Bits 23-16
Bit 14
T4MD
—
—
—
—
—
—
—
—
COSC<2:0>
IC6MD IC5MD IC4MD IC3MD IC2MD
Bit 13
T3MD
—
FWDTEN
MCLREN
Bit 15
FCKSM<1:0>
Bit 12
T2MD
—
—
—
—
—
T1MD
Bit 11
Bit 14
—
—
—
—
—
—
—
—
Bit 10
—
—
LVDL<3:0>
Bit 13
—
—
—
—
—
RBS<1:0>
RSS<1:0>
NOSC<2:0>
Bit 9
—
—
Bit 12
—
—
—
—
—
DCIMD
IC1MD
Bit 8
—
(1)
Bit 11
—
—
—
—
—
—
—
OC8MD OC7MD
I2CMD
EXTR
Bit 7
—
POST<1:0>
Bit 10
—
—
—
—
—
—
U2MD
Bit 6
SWR
—
FOS<2:0>
Bit 9
SWDTEN
OC6MD
—
—
—
—
—
LOCK
U1MD
ESS<1:0>
Bit 5
(1)
—
Bit 8
EBS
—
—
—
—
SPI2MD SPI1MD
OC5MD OC4MD OC3MD
WDTO
Bit 4
—
—
BOREN
BKBUG
Bit 7
—
—
—
—
—
SLEEP
Bit 3
CF
Bit 6
COE
—
—
—
—
—
—
C2MD
Bit 2
IDLE
—
TUN<3:0>
Bit 5
FWPSA<1:0>
BORV<1:0>
—
—
—
—
—
LPOSCEN OSWEN Depends on Configuration bits.
OC2MD
C1MD
Bit 1
BOR
Bit 4
—
—
—
—
ADCMD
OC1MD
Bit 0
POR
Bit 3
—
—
—
Depends on type of Reset.
BSS<2:0>
SSS<2:0>
FPR<4:0>
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
Bit 2
—
GSS<1:0>
—
FWPSB<3:0>
Reset State
Bit 1
FPWRT<1:0>
ICS<1:0>
BWRP
SWRP
GWRP
Bit 0