PIC16LF874-04I/L Microchip Technology, PIC16LF874-04I/L Datasheet - Page 96
![IC MCU FLASH 4KX14 EE A/D 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC16LF874-04I/L
Manufacturer Part Number
PIC16LF874-04I/L
Description
IC MCU FLASH 4KX14 EE A/D 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F873-04SO.pdf
(218 pages)
Specifications of PIC16LF874-04I/L
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16LF874-04I/LR
PIC16LF874-04I/LR
PIC16LF874-04I/LR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF874-04I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC16F87X
9.3
For standard-mode I
resistors R
lowing parameters:
• Supply voltage
• Bus capacitance
• Number of connected devices
The supply voltage limits the minimum value of resistor
R
V
FIGURE 9-27:
DS30292C-page 94
OL
p
(input current + leakage current)
, due to the specified minimum sink current of 3 mA at
Note: I
max = 0.4V, for the specified output stages. For
Connection Considerations for
I
2
C Bus
p
connected.
2
C devices with input levels related to V
and R
s
in Figure 9-27 depend on the fol-
2
SAMPLE DEVICE CONFIGURATION FOR I
C bus devices, the values of
SDA
SCL
R
p
R
DD
p
must have one common supply line to which the pull-up resistor is also
R
s
V
DD
DEVICE
R
+ 10%
s
example, with a supply voltage of V
V
V
desired noise margin of 0.1V
the maximum value of R
and used to improve ESD susceptibility.
The bus capacitance is the total capacitance of wire,
connections, and pins. This capacitance limits the max-
imum value of R
(Figure 9-27).
The SMP bit is the slew rate control enabled bit. This bit
is in the SSPSTAT register, and controls the slew rate
of the I/O pins when in I
OL
DD
max = 0.4V at 3 mA, R
as a function of R
2
C BUS
p
due to the specified rise time
p
2
s
p
C mode (master or slave).
is shown in Figure 9-27. The
. Series resistors are optional
C
2001 Microchip Technology Inc.
min = (5.5-0.4)/0.003 = 1.7 k
b
=10 - 400 pF
DD
for the low level limits
DD
= 5V±10% and
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