ATMEGA644P-20AU Atmel, ATMEGA644P-20AU Datasheet - Page 204
ATMEGA644P-20AU
Manufacturer Part Number
ATMEGA644P-20AU
Description
IC MCU AVR 64K FLASH 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA164P-20AU.pdf
(28 pages)
2.ATMEGA164P-20AU.pdf
(439 pages)
3.ATMEGA324P-20AU.pdf
(26 pages)
Specifications of ATMEGA644P-20AU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 channel
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
20 MIPS
Eeprom Memory
2K Bytes
Input Output
32
Interface
2-Wire/JTAG/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TQFP
Programmable Memory
64K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
2.7-5.5 V
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
4KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA644P-20AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 204 of 439
- Download datasheet (10Mb)
17.8
17.8.1
17.8.2
17.8.3
8011O–AVR–07/10
Register Description
UDRn – USART MSPIM I/O Data Register
UCSRnA – USART MSPIM Control and Status Register n A
UCSRnB – USART MSPIM Control and Status Register n B
The following section describes the registers used for SPI operation using the USART.
The function and bit description of the USART data register (UDRn) in MSPI mode is identical to
normal USART operation. See “UDRn – USART I/O Data Register n” on page 189.
• Bit 7 - RXCn: USART Receive Complete
This flag bit is set when there are unread data in the receive buffer and cleared when the receive
buffer is empty (that is, does not contain any unread data). If the Receiver is disabled, the
receive buffer will be flushed and consequently the RXCn bit will become zero. The RXCn Flag
can be used to generate a Receive Complete interrupt (see description of the RXCIEn bit).
• Bit 6 - TXCn: USART Transmit Complete
This flag bit is set when the entire frame in the Transmit Shift Register has been shifted out and
there are no new data currently present in the transmit buffer (UDRn). The TXCn Flag bit is auto-
matically cleared when a transmit complete interrupt is executed, or it can be cleared by writing
a one to its bit location. The TXCn Flag can generate a Transmit Complete interrupt (see
description of the TXCIEn bit).
• Bit 5 - UDREn: USART Data Register Empty
The UDREn Flag indicates if the transmit buffer (UDRn) is ready to receive new data. If UDREn
is one, the buffer is empty, and therefore ready to be written. The UDREn Flag can generate a
Data Register Empty interrupt (see description of the UDRIE bit). UDREn is set after a reset to
indicate that the Transmitter is ready.
• Bit 4:0 - Reserved Bits in MSPI mode
When in MSPI mode, these bits are reserved for future use. For compatibility with future devices,
these bits must be written to zero when UCSRnA is written.
• Bit 7 - RXCIEn: RX Complete Interrupt Enable
Writing this bit to one enables interrupt on the RXCn Flag. A USART Receive Complete interrupt
will be generated only if the RXCIEn bit is written to one, the Global Interrupt Flag in SREG is
written to one and the RXCn bit in UCSRnA is set.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
RXCn
R/W
7
0
RXCIEn
R/W
7
0
TXCn
R/W
6
0
TXCIEn
R/W
6
0
UDREn
R/W
5
0
UDRIE
R/W
5
0
R
4
0
-
RXENn
R/W
4
0
ATmega164P/324P/644P
R
3
0
-
TXENn
R/W
3
0
R
2
1
-
R
2
1
-
R
1
1
-
R
1
1
-
R
0
0
-
R
0
0
-
UCSRnA
UCSRnB
204
Related parts for ATMEGA644P-20AU
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Manufacturer:
Atmel Corporation
Datasheet:
Part Number:
Description:
IC AVR MCU FLASH 64K 44-QFN
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
IC AVR MCU FLASH 64K 44TQFP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
IC AVR MCU FLASH 64K 40DIP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
MCU AVR 64K FLASH 20MHZ 44TQFP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
MCU AVR 64K FLASH 20MHZ 44QFN
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
Atmega644 8-bit Avr Microcontroller With 64k Bytes In-system Programmable Flash
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Atmel Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
IC AVR MCU 64K 16MHZ 5V 64TQFP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
IC AVR MCU 64K 16MHZ 5V 64-QFN
Manufacturer:
Atmel
Datasheet: