PIC24FJ128GB110-I/PT Microchip Technology, PIC24FJ128GB110-I/PT Datasheet - Page 128

• Manufacturer Part Number: PIC24FJ128GB110-I/PT
• Description: IC PIC MCU FLASH 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GB110-I/PT

• Core Size: 16-Bit
• Program Memory Size: 128KB (43K x 24)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 83
• Ram Memory Size: 16KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 84
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA240014 - MODULE PLUG-IN PIC24
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC24FJ256GB110 FAMILY
8.5
Because of the timing requirements imposed by USB,
an internal clock of 48 MHz is required at all times while
the USB module is enabled. Since this is well beyond
the maximum CPU clock speed, a method is provided
to internally generate both the USB and system clocks
from a single oscillator source. PIC24FJ256GB110
family devices use the same clock structure as other
PIC24FJ devices, but include a two-branch PLL system
to generate the two clock signals.
The USB PLL block is shown in Figure 8-2. In this
system, the input from the Primary Oscillator is divided
down by a PLL prescaler to generate a 4 MHz output.
This is used to drive an on-chip 96 MHz PLL frequency
multiplier to drive the two clock branches. One branch
uses a fixed divide-by-2 frequency divider to generate
the 48 MHz USB clock. The other branch uses a fixed
divide-by-3 frequency divider and configurable PLL
prescaler/divider to generate a range of system clock
frequencies. The CPDIV bits select the system clock
speed; available clock options are listed in Table 8-2.
The USB PLL prescaler does not automatically sense
the incoming oscillator frequency. The user must man-
ually configure the PLL divider to generate the required
4 MHz output, using the PLLDIV<2:0> Configuration
bits. This limits the choices for Primary Oscillator fre-
quency to a total of 8 possibilities, shown in Table 8-3.
FIGURE 8-2:
DS39897C-page 128
(4 MHz or
8 MHz)
Input from
POSC
Input from
FRC
Oscillator Modes and USB
Operation
FNOSC<2:0>
USB PLL BLOCK
 12
 10
 6
 5
 4
 3
 2
 1
PLLDIV<2:0>
111
110
101
100
011
010
001
000
4 MHz
PLLDIS
96 MHz
PLL
TABLE 8-2:
TABLE 8-3:
Input Oscillator
Frequency
 2
 3
MCU Clock Division
48 MHz
40 MHz
24 MHz
20 MHz
16 MHz
12 MHz
8 MHz
4 MHz
(CPDIV<1:0>)
None (00)
32 MHz
2 (01)
4 (10)
8 (11)
SYSTEM CLOCK OPTIONS
DURING USB OPERATION
VALID PRIMARY OSCILLATOR
CONFIGURATIONS FOR USB
OPERATIONS
HSPLL, ECPLL
HSPLL, ECPLL
HSPLL, ECPLL
HSPLL, ECPLL
ECPLL, XTPLL
ECPLL, XTPLL
Clock Mode
ECPLL
ECPLL
 2009 Microchip Technology Inc.
 8
 4
 2
 1
CPDIV<1:0>
11
10
01
00
Clock Frequency
Microcontroller
PLL Output
for System Clock
48 MHz Clock
for USB Module
32 MHz
16 MHz
8 MHz
4 MHz
(PLLDIV<2:0>)
PLL Division
12 (111)
10 (110)
6 (101)
5 (100)
4 (011)
3 (010)
2 (001)
1 (000)