PIC16C66-04I/SP Microchip Technology, PIC16C66-04I/SP Datasheet - Page 102

• Manufacturer Part Number: PIC16C66-04I/SP
• Description: IC MCU OTP 8KX14 PWM 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C66-04I/SP

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Core Processor: PIC
• Speed: 4MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: OTP
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 22
• Ram Memory Size: 368Byte
• Cpu Speed: 4MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 2
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 4 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 22
• Interface Type: I2C/SPI/USART
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16C63A/65B/73B/74B
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
CALL
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS30605C-page 102
Bit Test, Skip if Clear
[label] BTFSC f,b
0
0
skip if (f<b>) = 0
None
If bit ’b’ in register ’f’ is ’1’, the next
instruction is executed.
If bit ’b’, in register ’f’, is ’0’, the next
instruction is discarded, and a NOP is
executed instead, making this a 2 T
instruction.
Bit Test f, Skip if Set
[label] BTFSS f,b
0
0
skip if (f<b>) = 1
None
If bit ’b’ in register ’f’ is ’0’, the next
instruction is executed.
If bit ’b’ is ’1’, then the next instruction
is discarded and a NOP is executed
instead making this a 2T
Call Subroutine
[ label ] CALL k
0
(PC)+ 1
k
(PCLATH<4:3>)
None
Call Subroutine. First, return address
(PC+1) is pushed onto the stack. The
eleven bit immediate address is
loaded into PC bits <10:0>. The upper
bits of the PC are loaded from
PCLATH. CALL is a two-cycle
instruction.
f
b < 7
f
b
k
PC<10:0>,
127
127
7
2047
TOS,
PC<12:11>
CY
instruction.
CY
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Description:
Clear W
[ label ] CLRW
None
00h
1
Z
W register is cleared. Zero bit (Z) is
set.
Clear Watchdog Timer
[ label ] CLRWDT
None
00h
0
1
1
TO, PD
CLRWDT instruction resets the Watch-
dog Timer. It also resets the prescaler
of the WDT. Status bits TO and PD
are set.
Clear f
[label] CLRF
0
00h
1
Z
The contents of register ’f’ are cleared
and the Z bit is set.
f
Z
WDT prescaler,
TO
PD
Z
2000 Microchip Technology Inc.
127
(W)
WDT
(f)
f