PIC24FJ128GA106-I/PT Microchip Technology, PIC24FJ128GA106-I/PT Datasheet - Page 158

IC PIC MCU FLASH 64TQFP

PIC24FJ128GA106-I/PT

Manufacturer Part Number
PIC24FJ128GA106-I/PT
Description
IC PIC MCU FLASH 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ128GA106-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (43K x 24)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDMA240015 - BOARD MCV PIM FOR 24F256GA
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ128GA106-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC24FJ128GA106-I/PT
0
PIC24FJ128GA010 FAMILY
18.1
The RTCC module registers are organized into three
categories:
• RTCC Control Registers
• RTCC Value Registers
• Alarm Value Registers
18.1.1
To limit the register interface, the RTCC Timer and
Alarm Time registers are accessed through corre-
sponding register pointers. The RTCC Value register
window (RTCVALH and RTCVALL) uses the RTCPTR
bits (RCFGCAL<9:8>) to select the desired Timer
register pair (see Table 18-1). By writing the RTCVALH
byte, the RTCC Pointer value, RTCPTR<1:0>, decre-
ments by one until it reaches ‘00’. Once it reaches ‘00’,
the MINUTES and SECONDS value will be accessible
through RTCVALH and RTCVALL until the pointer
value is manually changed.
TABLE 18-1:
The Alarm Value register window (ALRMVALH and
ALRMVALL)
(ALCFGRPT<9:8>) to select the desired Alarm register
pair (see Table 18-2).
EXAMPLE 18-1:
DS39747D-page 156
asm volatile("disi #5");
asm volatile("mov #0x55, w7");
asm volatile("mov w7, _NVMKEY");
asm volatile("mov #0xAA, w8");
asm volatile("mov w8, _NVMKEY");
asm volatile("bset _RCFGCAL, #13");
Note:
RTCPTR
<1:0>
00
01
10
11
RTCC Module Registers
REGISTER MAPPING
To avoid accidental writes to the timer, it is recommended that the RTCWREN bit (RCFGCAL<13>) is kept clear at
any other time. For the RTCWREN bit to be set, there is only 1 instruction cycle time window allowed between the
55h/AA sequence and the setting of RTCWREN; therefore, it is recommended that the code in Example 18-1 be
followed.
uses
RTCVAL<15:8>
RTCVAL REGISTER MAPPING
RTCC Value Register Window
WEEKDAY
MINUTES
MONTH
SETTING THE RTCWREN BIT
the
ALRMPTR
RTCVAL<7:0>
SECONDS
HOURS
YEAR
DAY
//set the RTCWREN bit
Preliminary
bits
By writing the ALRMVALH byte, the Alarm Pointer
value, ALRMPTR<1:0>, decrements by one until it
reaches ‘00’. Once it reaches ‘00’, the ALRMMIN and
ALRMSEC
ALRMVALH and ALRMVALL until the pointer value is
manually changed.
TABLE 18-2:
Considering that the 16-bit core does not distinguish
between 8-bit and 16-bit read operations, the user must
be aware that when reading either the ALRMVALH or
ALRMVALL bytes will decrement the ALRMPTR<1:0>
value. The same applies to the RTCVALH or RTCVALL
bytes with the RTCPTR<1:0> being decremented.
18.1.2
In order to perform a write to any of the RTCC Timer
registers, the RTCWREN bit (RCFGCAL<13>) must be
set (refer to Example 18-1).
ALRMPTR
Note:
<1:0>
00
01
10
11
This only applies to read operations and
not write operations.
WRITE LOCK
value
ALRMVAL<15:8> ALRMVAL<7:0>
ALRMVAL REGISTER
MAPPING
Alarm Value Register Window
ALRMMNTH
ALRMMIN
ALRMWD
will
© 2007 Microchip Technology Inc.
be
accessible
ALRMSEC
ALRMDAY
ALRMHR
through

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