PIC24FJ128GA008-I/PT Microchip Technology, PIC24FJ128GA008-I/PT Datasheet - Page 24

• Manufacturer Part Number: PIC24FJ128GA008-I/PT
• Description: IC PIC MCU FLASH 128K 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA008-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (43K x 24)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 69
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SPI/I2C/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011, DV164033, MA240011, AC164127
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Controller Family/series: PIC24
• No. Of I/o's: 69
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Package: 80TQFP
• Device Core: PIC
• Family Name: PIC24
• Maximum Speed: 16 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FJXXXGA0XX
3.9
The procedure for reading configuration memory is
similar to the procedure for reading code memory,
except that 16-bit data words are read (with the upper
byte read being all ‘0’s) instead of 24-bit words. Since
there are two Configuration registers, they are read one
register at a time.
TABLE 3-9:
DS39768D-page 24
Step 1: Exit Reset vector.
Step 2: Initialize TBLPAG, the Read Pointer (W6) and the Write Pointer (W7) for TBLRD instruction.
Step 3: Read the Configuration register and write it to the VISI register (located at 784h), and clock out the
Step 4: Repeat Step 3 again to read Configuration Word 1.
Step 5: Reset device internal PC.
Command
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
0000
Reading Configuration Words
VISI register using the REGOUT command.
SERIAL INSTRUCTION EXECUTION FOR READING ALL CONFIGURATION MEMORY
000000
040200
000000
200xx0
880190
2xxxx7
207847
000000
BA0BB6
000000
000000
<VISI>
000000
040200
000000
(Hex)
Data
NOP
GOTO
NOP
MOV
MOV
MOV
MOV
NOP
TBLRDL
NOP
NOP
Clock out contents of VISI register
NOP
GOTO
NOP
0x200
<CW2Address23:16>, W0
W0, TBLPAG
<CW2Address15:0>, W6
#VISI, W7
[W6++], [W7]
0x200
Table 3-9 shows the ICSP programming details for
reading the Configuration Words. Note that the
TBLPAG register must be loaded with 00h for 96 Kbyte
and below devices and 01h for 128 Kbyte devices (the
upper byte address of configuration memory), and the
Read Pointer, W6, is initialized to the lower 16 bits of
the Configuration Word location.
Description
© 2008 Microchip Technology Inc.