PIC18F1320-I/SO Microchip Technology, PIC18F1320-I/SO Datasheet - Page 9

IC MCU FLASH 4KX16 A/D 18SOIC

PIC18F1320-I/SO

Manufacturer Part Number
PIC18F1320-I/SO
Description
IC MCU FLASH 4KX16 A/D 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F1320-I/SO

Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
7-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F1320-I/SO
Manufacturer:
MICROCHIP
Quantity:
35 000
Part Number:
PIC18F1320-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
FIGURE 2-12:
2.7.2
The core instruction passes a 16-bit instruction to the
CPU core for execution. This is needed to set up
registers, as appropriate for use with other commands.
If the instruction is a 1-word, 1-cycle instruction, it will
be executed while the next command is clocked in.
 2010 Microchip Technology Inc.
PGC
PGD
4-Bit Command (LSb first)
P3
CORE INSTRUCTION
1
P2
1
2
0
P4
3
1
TABLE WRITE, POST-INCREMENT TIMING
4
1
P2A
P5
P2B
1
0
2
0
0
3
0
4
0
5
0
16-Bit Data Payload (LSb first)
6
0
PGD = Input
4
7
1
8
0
9
0
If the instruction is a 2-word, 2-cycle instruction,
another core instruction command is required with the
second word of the instruction. The instruction will
complete when a third 4-bit command has been
loaded.
10
0
C
11
1
PIC18FX220/X320
12
1
(1101
13
1
14
)
1
3
15
0
16
0
P5A
Fetch Next 4-Bit Command
1
n
2
n
DS39592F-page 9
3
n
4
n

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