PIC16C716-04I/P Microchip Technology, PIC16C716-04I/P Datasheet - Page 36

• Manufacturer Part Number: PIC16C716-04I/P
• Description: IC MCU OTP 2KX14 A/D PWM 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C716-04I/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1059 - ADAPTER 18 ZIF BD W/18SO PLUGSDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

PIC16C712/716
5.3
A crystal oscillator circuit is built in between pins T1OSI
(input) and T1OSO (amplifier output). It is enabled by
setting control bit T1OSCEN (T1CON<3>). The oscilla-
tor is a low-power oscillator rated up to 200 kHz. It will
continue to run during Sleep. It is primarily intended for
a 32 kHz crystal. Table 5-2 shows the capacitor
selection for the Timer1 oscillator.
The Timer1 oscillator is identical to the LP oscillator.
The user must provide a software time delay to ensure
proper oscillator start-up.
TABLE 5-2:
TABLE 5-3:
DS41106B-page 34
Note 1: Higher capacitance increases the stability of
Address Name
0Bh,8Bh
0Ch
8Ch
0Eh
0Fh
10h
07h
87h
Legend: x = unknown, u = unchanged, — = unimplemented read as ‘0’. Shaded cells are not used by the Timer1 module.
Osc Type
LP
These values are for design guidance only.
2: Since each resonator/crystal has its own
Timer1 Oscillator
oscillator but also increases the start-up
time.
characteristics, the user should consult the
resonator/crystal manufacturer for
appropriate values of external components.
INTCON
PIR1
PIE1
TMR1L
TMR1H
T1CON
DATACC
P
TRISCCP
100 kHz
200 kHz
32 kHz
Freq.
CAPACITOR SELECTION FOR
THE TIMER1 OSCILLATOR
REGISTERS ASSOCIATED WITH TIMER1 AS A TIMER/COUNTER
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Bit 7 Bit 6
GIE
—
—
—
—
—
PEIE
ADIF
ADIE
—
—
—
33 pF
15 pF
15 pF
C1
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu
Bit 5
T0IE
—
—
—
—
33 pF
15 pF
15 pF
C2
INTE
Bit 4
—
—
—
—
RBIE
Bit 3
—
—
—
—
5.4
The TMR1 Register pair (TMR1H:TMR1L) increments
from 0000h to FFFFh and rolls over to 0000h. The
TMR1 interrupt, if enabled, is generated on overflow
which is latched in interrupt flag bit TMR1IF (PIR1<0>).
This interrupt can be enabled/disabled by setting/clear-
ing TMR1 interrupt enable bit TMR1IE (PIE1<0>).
5.5
If the CCP module is configured in Compare mode to
generate a “Special Event Trigger” (CCP1M3:CCP1M0
= 1011), this signal will reset Timer1 and start an A/D
conversion (if the A/D module is enabled).
Timer1 must be configured for either Timer or Synchro-
nized Counter mode to take advantage of this feature.
If Timer1 is running in Asynchronous Counter mode,
this reset operation may not work.
In the event that a write to Timer1 coincides with a
Special Event Trigger from CCP1, the write will take
precedence.
In this mode of operation, the CCPR1H:CCPR1L
registers pair effectively becomes the period register
for Timer1.
Note:
CCP1IE
CCP1IF
DCCP
TCCP
Bit 2
T0IF
Timer1 Interrupt
Resetting Timer1 using a CCP
Trigger Output
The Special Event Triggers from the
CCP1 module will not set interrupt flag bit
TMR1IF (PIR1<0>).
TMR2IE
TMR2IF
INTF
Bit 1
—
—
TMR1IF
TMR1IE
DT1CK
TT1CK
© 2005 Microchip Technology Inc.
RBIF
Bit 0
0000 000x 0000 000u
-0-- -000 -0-- -000
-0-- -000 -0-- -000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---- -x-x ---- -u-u
---- -1-1 ---- -1-1
Value on
POR,
BOR
Value on
all other
Resets