PIC18F25J11-I/ML Microchip Technology, PIC18F25J11-I/ML Datasheet - Page 148

IC PIC MCU FLASH 32K 2V 28-QFN

PIC18F25J11-I/ML

Manufacturer Part Number
PIC18F25J11-I/ML
Description
IC PIC MCU FLASH 32K 2V 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18F25J11-I/ML

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
16
Ram Memory Size
3.6875KB
Cpu Speed
48MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180023
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F25J11-I/ML
Manufacturer:
MICROCHIP
Quantity:
4 000
PIC18F46J11 FAMILY
Choosing the configuration requires the review of all
PPSs and their pin assignments, especially those that
will not be used in the application. In all cases, unused
pin selectable peripherals should be disabled com-
pletely. Unused peripherals should have their inputs
assigned to an unused RPn pin function. I/O pins with
unused RPn functions should be configured with the
null peripheral output.
The assignment of a peripheral to a particular pin does
not automatically perform any other configuration of the
pin’s I/O circuitry. In theory, this means adding a pin
selectable output to a pin may mean inadvertently driv-
ing an existing peripheral input when the output is
driven. Users must be familiar with the behavior of
other fixed peripherals that share a remappable pin and
know when to enable or disable them. To be safe, fixed
digital peripherals that share the same pin should be
disabled when not in use.
Along these lines, configuring a remappable pin for a
specific peripheral does not automatically turn that
feature on. The peripheral must be specifically config-
ured for operation and enabled, as if it were tied to a
fixed pin. Where this happens in the application code
(immediately following device Reset and peripheral
configuration or inside the main application routine)
depends on the peripheral and its use in the
application.
A final consideration is that the PPS functions neither
override analog inputs nor reconfigure pins with analog
functions for digital I/O. If a pin is configured as an
analog input on device Reset, it must be explicitly
reconfigured as digital I/O when used with a PPS.
Example 9-7 provides a configuration for bidirectional
communication with flow control using EUSART2. The
following input and output functions are used:
• Input Function RX2
• Output Function TX2
DS39932C-page 148
EXAMPLE 9-7:
//*************************************
// Unlock Registers
//*************************************
_asm
; PPS registers are in BANK 14
MOVLB
MOVLW
MOVWF
MOVLW
MOVWF
; PPS Write Protect off
BCF
_endasm
//***************************
// Configure Input Functions
// (See Table 9-13)
//***************************
//***************************
// Assign RX2 To Pin RP0
//***************************
_asm
MOVLW
MOVWF
_endasm
//***************************
// Configure Output Functions
// (See Table 9-14)
//***************************
//***************************
// Assign TX2 To Pin RP1
//***************************
_asm
MOVLW
MOVWF
_endasm
//*************************************
// Lock Registers
//*************************************
_asm
MOVLW
MOVWF
MOVLW
MOVWF
; PPS Write Protected
BSF
_endasm
Note:
If the Configuration bit, IOL1WAY = 1,
once the IOLOCK bit is set, it cannot be
cleared, preventing any future RP register
changes. The IOLOCK bit is cleared back
to ‘0’ on any device Reset.
0x0E
0x55
EECON2, 0
0xAA
EECON2, 0
PPSCON, IOLOCK, BANKED
0x00
RPINR16, BANKED
0x05
RPOR1, BANKED
0x55
EECON2, 0
0xAA
EECON2, 0
PPSCON, IOLOCK, BANKED
CONFIGURING EUSART2
INPUT AND OUTPUT
FUNCTIONS
© 2009 Microchip Technology Inc.

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