PIC18F14K50-I/SO Microchip Technology, PIC18F14K50-I/SO Datasheet - Page 304

• Manufacturer Part Number: PIC18F14K50-I/SO
• Description: IC PIC MCU FLASH 8KX16 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F14K50-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, MSSP, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 20SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244023 - PROC EXTENS PAK PIC18F1XK50DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPXLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICAC164307 - MODULE SKT FOR PM3 28SSOP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F/LF1XK50
FIGURE 24-2:
DS41350E-page 304
Address (from/to)
Note:
0FFFh
1FFFh
2FFFh
3FFFh
4FFFh
5FFFh
6FFFh
7FFFh
FFFFh
01FFh
0200h
03FFh
05FFh
07FFh
0800h
1000h
2000h
27FFh
2800h
3000h
37FFh
3800h
4000h
47FFh
4800h
5000h
57FFh
5800h
6000h
67FFh
6800h
7000h
77FFh
7800h
8000h
0000h
0400h
0600h
Refer to the test section for requirements on test memory mapping.
CPB, WRTB, EBTRB
CP0, WRT0, EBTR0
CP1, WRT1, EBTR1
CODE-PROTECTED PROGRAM MEMORY FOR PIC18F/LF1XK50
Boot Block, 2 KW
Reads all ‘0’s
BBSIZ = 1
Block 0
Block 1
2 KW
4 KW
14K50
CPB, WRTB, EBTRB
CP0, WRT0, EBTR0
CP1, WRT1, EBTR1
Boot Block, 1 KW
Reads all ‘0’s
Preliminary
BBSIZ = 0
Block 0
Block 1
3 KW
4 KW
Device
CPB, WRTB, EBTRB
CP0, WRT0, EBTR0
CP1, WRT1, EBTR1
Boot Block, 1 KW
Reads all ‘0’s
BBSIZ = 1
Block 0
Block 1
1 KW
2 KW
 2010 Microchip Technology Inc.
13K50
Boot Block, 0.512 KW
CPB, WRTB, EBTRB
CP0, WRT0, EBTR0
CP1, WRT1, EBTR1
Reads all ‘0’s
BBSIZ = 0
1.512 KW
Block 0
Block 1
2 KW